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ICB2FL03G Datasheet, PDF (13/60 Pages) Infineon Technologies AG – 2nd Generation FL Controller for Fluorescent Lamp Ballasts
ICB2FL03G
Controller for Fluorescent Lamp Ballasts
Pin Configuration and Functionality
The sensed current fed into the LVS pin has to exceed 12 μA typically at a voltage level of 6.0 V at the LVS pin.
The reaction on the high side filament detection is mirrored at the RES pin (see pin 13). In addition, the detection
of available mains supply after an interruption is sensed by this pin. Together with the RES pin, the IC can monitor
the lamp removal of one lamp path (series connection of lamps is possible). If the functionality of this pin is not
required, it can be disabled by connecting this pin to ground.
During run mode the lamp voltage is monitored with this pin by sensing a current proportional to the lamp voltage
via resistors. An overload is indicated by an excessive lamp voltage. If the peak-to-peak lamp voltage causes a
peak-to-peak current above a threshold of 210 μAPP for longer than 620 μs, a fault EOL1 (end-of-life) is assumed.
If the DC current at the LVS pin exceeds a threshold of ±42 μA for longer than 2500 ms, a fault EOL2 (rectifier
effect) is assumed. The levels of AC sense current and DC sense current can be set separately by an external RC
network. Note that in the case of deactivation of the LVS PIN, reactivation starts when the voltage at the LVS pin
exceeds VLVSEnable1 in RUN Mode.
RES (restart, pin 13)
A source current flowing out of this pin via resistor and filament to ground monitors the existence of the low-side
filament of the fluorescent lamp for restart after lamp removal. A capacitor from this pin directly to ground
eliminates a superimposed AC voltage that is generated as a voltage drop across the low-side filament. With a
second sense resistor, the filament of a parallel lamp can be included in the lamp removal sensing. Note that
during startup the chip supply voltage Vcc has to be below 14.0 V before VRES reaches the filament detection level.
During typical start-up with connected filaments of the lamp a current source IRES3 (-21.3 μA) is active as long as
VCC > 10.6 V and VRES < VRES1 (1.6 V). An open low-side filament is detected when VRES > VRES1. Such a condition
will prevent the start-up of the IC. In addition, the comparator threshold is set to VRES2 (1.3 V) and the current
source changes to IRES4 (-17.7 μA). The system is then waiting for a voltage level lower than VRES2 at the RES pin
to indicate a connected low-side filament, which will enable the start-up of the IC.
An open high-side filament is detected when there is no sink current ILVSSINK (< 12 μA typ.) into the LVS pin before
the VCC start-up threshold is reached. Under these conditions the current source at the RES pin is IRES1 (-42.6 μA)
as long as VCC > 10.6 V and VRES < VRES1 (1.6 V) and the current source is IRES2 (-35.4 μA) when the threshold
has changed to VRES2 (1.3 V). In this way, the detection of the high-side filament is mirrored at the levels on the
RES pin.
There is a further threshold of 3.2 V active at the RES pin during run mode. If the voltage level rises above this
threshold for longer than 620 μs, the IC changes over into latched fault mode.
In any case of fault detection with different reaction times the IC turns off the gate drives and changes into
powerdown mode with a current consumption of 170 μA max. An internal timer generates a delay time of 200 ms
before start-up conditions are checked again. As soon as start-up conditions are valid, a second start-up attempt
is initiated. If this second attempt fails, the IC remains in latched fault mode until a reset is generated by UVLO or
lamp removal. The RES PIN can be deactivated by setting the PIN to GND (durable).
HSGND (high-side ground, pin 14)
This pin is connected to the source terminal of the high-side MOSFET, which is also the node of the high-side and
low-side MOSFET. This pin represents the floating ground level of the high-side driver and the high-side supply.
HSVCC (high-side supply voltage, pin 15)
This pin provides the power supply of the high-side ground-related section of the IC. An external capacitor between
pins 14 and 15 acts like a floating battery, which has to be recharged cycle by cycle via the high-voltage diode
from low-side supply voltage during on-time of the low-side MOSFET. There is a UVLO threshold with hysteresis
that enables the high-side section at 10.4 V and disables it at 8.6 V.
Final Data Sheet
13
V1.1, 2013-08-14