ICB2FL03G Datasheet, PDF (24/60 Pages) Infineon Technologies AG – 2nd Generation FL Controller for Fluorescent Lamp Ballasts

ICB2FL03G
Controller for Fluorescent Lamp Ballasts
Functional Description
2.4.2.1 Bus Overvoltage and PFC Open Loop
The bus voltage loop control is completely integrated (Figure 16) and provided by an 8-bit sigma/delta A/D
converter with a typical sampling rate of 280 μs and resolution of 4 mV/bit. After leaving phase 2 (monitoring), the
IC starts power-up (V_CC > 14.0 V). After power-up, the IC senses the bus voltage below 12.5 % (open loop) or
above 105 % (bus overvoltage) for 130 μs. In the case of bus overvoltage (V_BUSrated > 109 %) or open loop
(V_BUSrated < 12.5 %) in phases 3 to 8, the IC shuts off the gate drives of the PFC within 5 μs or 1 μs respectively.
In this case, the PFC restarts automatically when the bus voltage is within the corridor (12.5 % < V_BUSrated < 105 %)
again. Is the bus voltage valid after 130 μs, the bus voltage sensing is set to 12.5 % < V_BUSrated < 109 %. If these
thresholds are exceeded for longer than 1 μs (open loop) or 5 μs (overvoltage), the PFC gate drive stops working
until the voltage drops below 105 % or exceeds the 12.5 % level. If the bus overvoltage (> 109 %) lasts for longer
than 625 ms in run mode, the inverter gates also shut off and a power-down with complete restart is attempted
(Figure 15).
Rated BUS
Voltage V BR 1
2
3
4
5
6
7
8
109 %
105 %
VPFCVS = 2.725V
VPFCVS = 2.625V
BUS Over Voltage: Stops PFC Gate Drive within 5µs Auto Restart when VBR < 109 % / t > 625ms PD VBR < 105% Æ Fault U
100 %
95 %
VPFCVS = 2.500V
VPFCVS = 2.375V
Typical rated Bus Voltage Level
75 %
30 %
VPFCVS = 1.875V
Under Voltage V BR < 75%
t < 800ms AR without Preheating
t > 800ms AR with Preheating
12.5 %
0%
VPFCVS = 0.313 V
PFC Open Loop / keeps all Gate Drives within 1µs Auto Restart / t > 1µs Stops PFC FET till VBR > 12.5%Æ AR
V_CC < 10.6 VV_CC < 14.1 V
V_BUS>95% Soft Start
Preheating
Ignition
Pre-Run
Run Mode into normal Operation
60ms
35ms _{130 µs} 80ms 11ms
0 - 2500 ms
40 - 237ms
625ms
Mode /
Time
ERROR Corridor
AR = Auto Restart
PD = Power Down
CbC = Cycle by Cycle
Figure 15 PFC Bus Voltage Operating Level and Error Detection
2.4.2.2 Bus Voltage 95 % and 75 % Sensing
When the rated bus voltage is in the corridor of 12.5 % < V_BUSrated < 109 %, the IC will check whether the bus
voltage exceeds the 95 % threshold (Figure 15, phase 3) within 80 ms before entering the soft start phase 4.
Another threshold is activated when the IC enters the run mode (phase 8). If the rated bus voltage drops below
75 % for longer than 84 μs, a power-down with a complete restart is attempted when a counter exceeds 800 ms.
In the case of short-term bus undervoltage (the bus voltage reaches its working level in run mode before exceeding
typically 800 ms (min. 500 ms)) the IC skips phases 1 to 5 and starts with ignition (see Section 2.7.1 for conditions
for emergency lighting). The internal reference level of the bus voltage sense V_PFCVS is 2.5 V (100 % of the rated
bus voltage) with a high accuracy. A surge protection is activated in the case of a rated bus voltage of V_BUS >
109 % and a low side current sense voltage of V_LSCS > 1.6 V in pre-run mode, or V_LSCS > 0.8 V in run mode for
longer than 500 ns.
Final Data Sheet
24
V1.1, 2013-08-14