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HYB39L256160AC Datasheet, PDF (15/48 Pages) Infineon Technologies AG – 256 MBit Synchronous Low-Power DRAM
HYB 39L256160AC / T
256MBit 3.3V Mobile-RAM
Capacitance
TCASE = 0 to 70 °C (commercial),
f = 1 MHz
Parameter
Input Capacitance (CLK)
Input Capacitance
(A0 - A12, BA0, BA1, RAS, CAS, WE, CS, CKE, DQM)
Input/Output Capacitance (DQ)
Symbol
CI1
CI2
Values
min. max.
-
3.5
-
3.8
Unit
pF
pF
CIO
-
6.0 pF
Operating Currents
TCASE = 0 to 70 °C (commercial)
(Recommended Operating Conditions unless otherwise noted)
Parameter & Test Condition
Symbol -7.5 -8 Unit Note
max. max.
Operating current
single bank access cycles
tRC = tRC,MIN
IDD1
65 60 mA 3
Precharge standby current
in Power Down Mode
CS = VIH,MIN,
CKE £ VIL,MAX
IDD2P
0.6 0.5 mA 3
Precharge standby current
in Non Power Down Mode
No operating current
tCK = tCK,MIN, CS = VIH,MIN,
active state (max. 4 banks)
Burst Operating Current
Read command cycling
Auto Refresh Current
Auto Refresh command cycling
Self refresh current
CS = VIH,MIN,
CKE ³ VIH,MIN
CKE ³ VIH,MIN
CKE £ VIL,MAX
IDD2N
IDD3N
IDD3P
IDD4
tRC = tRC,MIN
IDD5
tCK =infinity
IDD6
20 18 mA 3
25 20 mA 3
3.5 3.5 mA 3
80 60 mA 3, 4
155 140 mA
475 475 mA
Notes
3. These parameters depend on the frequency. These values are measured at 133MHz for -7.5 and at 100MHz
for -8 parts. Input signals are changed once during tCK. If the devices are operating at a frequency less than the
maximum operation frequency, these current values are reduced.
4. These parameters are measured with continuous data stream during read access and all DQ toggling. CL = 3
and BL = 4 is used and the VDDQ current is excluded.
INFINEON Technologies AG
15
2002-12-20