TC1728 Datasheet, PDF (110/130 Pages) Infineon Technologies AG – 32-Bit Single-Chip Microcontroller

TC1728
Electrical Parameters
Table 35 MLI Transmitter
Parameter
TCLK rise time
TCLK fall time
TDATA/TVALID
output delay time
Symbol
Min.
t₁₃ CC −
t₁₄ CC −
t₁₅ CC -3
Values
Typ. Max.
−
0.3 x t₁₀₃₎
−
0.3 x t₁₀₃₎
−
4.4
Unit Note /
Test Condition
ns
ns
ns
TREADY setup time t₁₆ SR 18
−
−
ns
before TCLK rising
edge
TREADY hold time t₁₇ SR -2
−
−
ns
after TCLK rising edge
1) The following formula is valid: t11 + t12 = t10.
2) The min./max. TCLK low/high times t11/t12 include the PLL jitter of fSYS. Fractional divider settings must be
regarded additionally to t11 / t12.
3) For high-speed MLI interface, strong driver sharp or medium edge selection (class A2 pad) is recommended
for TCLK.
5.3.11.2 Micro Second Channel (MSC) Interface Timing
The MSC parameters are valid for C_L = 50 pF.
Table 36 MSC Parameters
Parameter
Symbol
Values
FCLP clock period¹⁾²⁾
t₄₀ CC
Min.
2x
T_MSC3)
Typ.
−
Max.
−
Unit Note /
Test Condition
ns
Data Sheet
5-64
V1.2, 2014-06