TC1728 Datasheet, PDF (103/130 Pages) Infineon Technologies AG – 32-Bit Single-Chip Microcontroller

TC1728
5.3.8
ERAY Phase Locked Loop (ERAY_PLL)
Electrical Parameters
Table 31 PLL_ERAY Parameters
Parameter
Symbol
Min.
Accumulated jitter at D_PP
SYSCLK pin
CC -0.8
Accumulated_Jitter
D_P
CC -0.5
PLL Base Frequency of f_{PLLBASE_ERAY} CC 50
the ERAY PLL
VCO input frequency of f_REF
the ERAY PLL
CC 20
VCO frequency range f_{VCO_ERAY} CC 450
of the ERAY PLL
PLL lock-in time
t_L
CC 5.6
Values
Typ. Max.
−
0.8
−
0.5
250 360
−
40
−
500
−
200
Unit Note /
Test Con
dition
ns
ns
MHz
MHz
MHz
μs
Note: The specified PLL jitter values are valid if the capacitive load per pin does not
exceed C_L = 20 pF with the maximum driver and sharp edge.
Data Sheet
5-57
V1.2, 2014-06