ICSSSTUAF32866C Datasheet, PDF (29/31 Pages) Integrated Device Technology – 25-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2

ICSSSTUAF32866C
25-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2
COMMERCIAL TEMPERATURE GRADE
Package Outline and Package Dimensions - BGA
Package dimensions are kept current with JEDEC Publication No. 95
A1
D
SEATING
PLANE
C
T
b REF
d TYP
D1
Numeric Designations
for Horizontal Grid
4321
A
B
C
D
Alpha Designations
for Vertical Grid
(Letters I, O, Q, and
S not used)
TOP VIEW
E
h TYP
c REF
0.12 C
-e- TYP
-e- TYP
E1
ALL DIMENSIONS IN MILLIMETERS
----- BALL GRID -----
Max.
D
E
T
e
HORIZ
VERT
TOTAL
d
Min/Max
Min/Max
13.50 Bsc 5.50 Bsc 1.20/1.40 0.80 Bsc
6
16
96
0.40/0.50
11.50 Bsc 5.00 Bsc 1.00/1.20 0.65 Bsc
6
16
96
0.35/0.45
Note: Ball grid total indicates maximum ball count for package. Lesser quantity may be used.
h
Min/Max
0.25/0.41
0.25/0.35
REF. DIMENSIONS
b
c
0.75
0.875
0.75
0.875
10-0055C
* Source Ref.: JEDEC Publication 95, MO-205
25-BIT CONFIGURABLE REGISTERED BUFFER FOR DDR2
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ICSSSTUAF32866C
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