IC-JRX Datasheet, PDF (8/23 Pages) IC-Haus GmbH – µP INTERFACE WITH 2×4 24V HIGH-SIDE DRIVERS

iC-JRX
µP INTERFACE WITH 2×4 24V HIGH-SIDE DRIVERS
Rev A1, Page 8/23
Control Word 5 (PWM enable and pin selection)
Bit
7
6
5
4
3
2
Name
-
-
-
PWMEN PWMPN PWM
ADR(2)
Add.: 14
reset entry: 00h
1
PWM
ADR(1)
0
PWM
ADR(0)
Bit 4
0
PWMEN
1
Bit 3
0
PWMPN
1
Bit 2..0
PWMADR 2..0
PWM "DISABLED"
(r)
PWM "ENABLED": the output selected with PWMADR receives the PWM signal. The relevant current
sources are switched off.
PWM signal active low
(r)
PWM signal active high
PWMADR2 PWMADR1 PWMADR0 Selected I/O pin
0
0
0
IO0 (control line PSEL0= 1)
0
0
1
IO1
0
1
0
IO2
0
1
1
IO3
1
0
0
IO4
1
0
1
IO5
1
1
0
IO6
1
1
1
IO7
PWM Register
Bit
Name
7
PWM7
6
PWM6
5
PWM5
4
PWM4
3
PWM3
2
PWM2
Add.: 15
reset entry: 00h
1
PWM1
0
PWM0
Bit 7..0
PWM7..0
'00'h
'...'h
'FF'h
Output stage "OFF" (continously)
(r)
Duration of the PWM signal in steps of 16× t(CLK)
Output stage "ON" (continously)
The PWM register determines the pulse length of the PWM signal. Output selection and enable are set via
Control Word 5.