IC-JRX Datasheet, PDF (3/23 Pages) IC-Haus GmbH – µP INTERFACE WITH 2×4 24V HIGH-SIDE DRIVERS

iC-JRX
µP INTERFACE WITH 2×4 24V HIGH-SIDE DRIVERS
PACKAGES PLCC44 to JEDEC Standard
PIN CONFIGURATION PLCC44
(top view)
Rev A1, Page 3/23
PIN FUNCTIONS PLCC44
No. Name Fct.
1 CSN I
2 WRN I
3 RDN I
4 BLFQ I
5 CLK I
6 INTN O
7 RESN I
8 D1
B
9 D3
B
10 D5
B
11 D7
B
12 GNDD
13 n.c.
14 n.c.
15 TEST B
16 GNDA
17 IO7 B
18 VB67
19 IO6 B
20 IO5 B
21 VB45
22 IO4 B
Description
Chip Select, active low
Write Enable, active low
Read Enable, active low
Clock Flash Mode
Clock Filter and PWM Function
Interrupt Message, active low
Reset, active low
Data Bus Bit 1
Data Bus Bit 3
Data Bus Bit 5
Data Bus Bit 7
Ground (digital section)
Test Pin
Ground (analog section)
I/O Stage 7
Power Supply Driver Stage 6+7
I/O Stage 6
I/O Stage 5
Power Supply Driver Stage 4+5
I/O Stage 4
No. Name Fct. Description
23 PGND
Ground (ESD protection circuitry)
24 IO3 B I/O Stage 3
25 VB23
Power Supply Driver Stage 2+3
26 IO2 B I/O Stage 2
27 IO1 B I/O Stage 1
28 VB01
Power Supply Driver Stage 0+1
29 IO0 B I/O Stage 0
30 VCCA
+5 V Supply Voltage (analog section)
31 POE I
Power Output Enable
32 n.c.
33 n.c.
34 VCCD
+5 V Supply Voltage (digital section)
35 D6
B Data Bus Bit 6
36 D4
B Data Bus Bit 4
37 D2
B Data Bus Bit 2
38 D0
B Data Bus Bit 0
39 A0
I
Address Bus Bit 0
40 A1
I
Address Bus Bit 1
41 A2
I
Address Bus Bit 2
42 A3
I
Address Bus Bit 3
43 A4
I
Address Bus Bit 4
44 n.c.
Functions: I = Input, O = Output, B = bidirectional
External wiring VCCA, VCCD to +5 V and GNDA, GNDD, PGND to 0 V required.