IC-JRX Datasheet, PDF (18/23 Pages) IC-Haus GmbH – µP INTERFACE WITH 2×4 24V HIGH-SIDE DRIVERS

iC-JRX
µP INTERFACE WITH 2×4 24V HIGH-SIDE DRIVERS
Rev A1, Page 18/23
OPERATING REQUIREMENTS: µP INTERFACE
Operating Cconditions: VCCD, VCCA= 5V ±10%, VB= 19.2..25.2V, GNDA= GNDD= PGND= 0V,
Ta= 0..70EC, CL()= 150pF, input levels lo= 0.45V, hi= 2.4V, see Fig. 3 for reference levels
Item Symbol Parameter
Conditions
Fig.
Data Word Read Timing
I1 tAR1
Setup Time:
4
tAR2
CSN, A0..4 set before RDN hi6lo
I2 tRA
Hold Time:
4
CSN, A0..4 stable after RDN lo6hi
I3 tRD
Read Data Access Time:
4
data valid after RDN hi6lo
I4 tDF
Read Data Hold Time:
4
ports high impedance after RDN lo6hi
I5 tRL
Required Read Signal Duration
at RDN
Data Word Write Timing
I6 tAW1
Setup Time:
4
tAW2
CSN, A0..4 set before WRN hi6lo
I7 tDW
Write Data Setup Time:
4
data valid before WRN lo6hi
I8 tWA
Hold Time:
4
CSN, A0..4 stable after WRN lo6hi
I9 tWD
Write Data Hold Time:
4
data valid after WRN lo6hi
I10 tWL
Required Write Signal Duration
4
at WRN
Read/Write Timing
I11 tcyc
Recovery Time between cycles:
4
RDN lo6hi to RDN hi6lo,
RDN lo6hi to WRN hi6lo,
WRN lo6hi to WDN hi6lo,
WRN lo6hi to RDN hi6lo
Min.
30
10
50
30
100
10
10
50
165
Unit
Max.
ns
ns
120
ns
65
ns
ns
ns
ns
ns
ns
ns
ns
Fig. 3: Reference levels
Fig. 4: Data word read/write timing