IC-JRX Datasheet, PDF (2/23 Pages) IC-Haus GmbH – µP INTERFACE WITH 2×4 24V HIGH-SIDE DRIVERS

iC-JRX
µP INTERFACE WITH 2×4 24V HIGH-SIDE DRIVERS
Rev A1, Page 2/23
DESCRIPTION
iC-JRX is an 8-fold high-side driver with integrated control logic, internally divided into two independent blocks
(nibbles). Both blocks can be individually set to input or output. The µP interface is made up of eight data, five
address and three control pins. Two further clock inputs control internal sequences (input filter, pulse
operation of the outputs). Starting with reset state, various register partitionings dependent on the selected
operating mode are possible.
Input mode is used to log logic levels at 24 V. An interrupt message can be generated when a signal at the
inputs changes. Spurious signals are rejected by the device's adjustable digital filters. When the inputs are
open the programmable pull-down current sets defined levels and acts as the bias current for switching
contacts.
In output mode the power output stages can drive any desired load to GND (e.g. lamps, long cables or relays)
at a continuous current of 100 mA or 500 mA in pulse operation. Spikes and flyback currents are discharged
through the integrated flyback circuits. All output stages are short-circuit-proof and two-stage temperature
monitoring (with interrupt messages) protects against thermal damage caused by large power dissipation. A
short circuit at one of the outputs can cause an interrupt; the current short circuit status can be scanned via
the µP interface. Pulse mode can be selected for each output, such as for indicator lamps in plugboards, in
order to offload the control software used. The actual switching level of the output can be read out via the µP
interface and be used to check for cable fractures with the pull-up currents. A PWM signal can also be
switched to any selected output. All outputs can be switched off via a mutual disable input e.g. by a processor-
independent watchdog circuit.
An interrupt pipeline which prevents the loss of interrupts allows reliable processing of interrupts using the
applied control software.
With low voltage the voltage monitor resets all registers and in doing so switches off the power output stages.
Diodes protect all inputs and outputs against ESD. The device is also immune to burst transients according
to IEC 1000-4-4 (4 kV; previously IEC 801-4).
5V
WR
RD
5V
ADRESS-
DEKODIERER
8
5
A0..A7
µP
D0..D7
INT
RES
8
5V
RESET
CONTROLLER
5V
1 CSN
2 WRN
3 RDN
39 A0
40 A1
41 A2
42 A3
43 A4
38 D0
8 D1
36 D2
9 D3
36 D4
10 D5
35 D6
11 D7
34 30
VCCD VCCA
C1
100 nF
31
POE
VB01 28
IO0 29
IO1 27
LOWER
NIBBLE
VB23 25
IO2 26
IO3 24
24 V
C2
3.3 ... 10 uF
C3 100 nF
S1
S2
C4 100 nF
S3
S4
HIGHER
NIBBLE
VB45 21
IO4 22
IO5 20
VB67 18
IO6 19
IO7 17
C5 100 nF
C6 100 nF
iC-JRX ^{7 RESN KONTROLL-}
LA1
LA2
6 INTN _{REGISTER PLCC44}
TEST BLFQ CLK
GNDD GNDA PGND
15
4
5
12 16 23
24 V
LA3
REL1
5V
1.25 MHz
Typical application circuit