IC-JRX Datasheet, PDF (5/23 Pages) IC-Haus GmbH – µP INTERFACE WITH 2×4 24V HIGH-SIDE DRIVERS

iC-JRX
µP INTERFACE WITH 2×4 24V HIGH-SIDE DRIVERS
Rev A1, Page 5/23
Control Word 1 (I/O filters)
Bit
Name
higher nibble
7
6
BYPH
-
lower nibble
5
4
3
2
FH1
FH0
BYPL
-
Add.: 10
reset entry: 00h
1
0
FL1
FL0
higher nibble
Bit 7
0
I/O filters active
(r)
BYPH
1
Bypass for I/O filters: the I/O signals are reprocessed in their unfiltered state.
Bit 5..4
FH1..0
FH1
FH0 Filter times
0
0
14.5 × tc(CLK)
± 1 × tc(CLK)
0
1
896.5 × tc(CLK) ± 64 × tc(CLK)
1
0
3584.5 × tc(CLK) ± 256 × tc(CLK)
1
1
7168.5 × tc(CLK) ± 512 × tc(CLK)
lower nibble
Bit 3
0
I/O filters active
(r)
BYPL
1
Bypass for I/O filters: the I/O signals are reprocessed in their unfiltered state.
Bit 1..0
FL1
FL0 Filter times
FL1..0
0
0
14.5 × tc(CLK)
± 1 × tc(CLK)
(r)
0
1
896.5 × tc(CLK) ± 64 × tc(CLK)
1
0
3584.5 × tc(CLK) ± 256 × tc(CLK)
1
1
7168.5 × tc(CLK) ± 512 × tc(CLK)
'-' Free memory location without a function. Status after a reset is ‘0’
'xx'h Indicates hexadecimal data for logic states. ‘x’ indicates binary data
(r) Status after a reset