IC-NG Datasheet, PDF (3/21 Pages) IC-Haus GmbH – 8-BIT Sin/D CONVERTER-PROCESSOR

iC-NG
8-BIT Sin/D CONVERTER-PROCESSOR
Rev D3, Page 3/21
PACKAGE SO28, SSOP28 to JEDEC Standard
PIN CONFIGURATION SO28
(top view)
1
NER
2
MFP
3
NRD
4
NWR
5
D0
6
D1
7
D2
8
D3
9
D4
10
D5
11
D6
12
D7
13
RCLK
14
VDD
28
SCL
27
SDA
26
NRES
25
GND
24
SIN
23
NSIN
22
PSIN
21
COS
20
NCOS
19
PCOS
18
ZERO
17
NZERO
16
PZERO
15
VREF
PIN FUNCTIONS
No. Name Function
1 NER
Error Message Output, low active
2 MFP
Multi-Functional I/O Pin
3 NRD
Read Signal, low active ¹⁾ / SSI Clock
4 NWR Write Signal, low active ¹⁾ / SSI Output
5 D0
Data Bus / Incremental Output A (AX)
6 D1
Data Bus / Incremental Output B (BX)
7 D2
Data Bus / Index Output Z (ZX)
8 D3
Data Bus / Sine-to-Square Output A (A4)
9 D4
Data Bus / Cosine-to-Square Output B (B4)
10 D5
Data Bus / Index-to-Square Output Z (Z4)
11 D6
Data Bus / CW-CCW Signal (ROT)
12 D7
Data Bus / AX EXOR BX (AXB)
13 RCLK Clock Input / Clock Oscillator Setting
14 VDD
+5V Supply Voltage
15 VREF Reference Center Voltage
16 PZERO Zero Amplifier Positive Input
17 NZERO Zero Amplifier Negative Input
18 ZERO Zero Amplifier Output
19 PCOS Cosine Amplifier Positive Input
20 NCOS Cosine Amplifier Negative Input
21 COS
Cosine Amplifier Output
22 PSIN Sine Amplifier Positive Input
23 NSIN Sine Amplifier Negative Input
24 SIN
Sine Amplifier Output
25 GND Ground
26 NRES Reset, low active
27 SDA
Mode Select / Data (Serial Interface)
28 SCL
Mode Select / Clock (Serial Interface)
Notes: 1) wiring to VDD recommended when not in use.
PIN CONFIGURATION SSOP28 5.3mm
(top view)
1
NER
2
MFP
3
NRD
4
NWR
5
D0
6
D1
7
D2
8
D3
9
D4
10
D5
11
D6
12
D7
13
RCLK
14
VDD
28
SCL
27
SDA
26
NRES
25
GND
24
SIN
23
NSIN
22
PSIN
21
COS
20
NCOS
19
PCOS
18
ZERO
17
NZERO
16
PZERO
15
VREF