IC-NG Datasheet, PDF (18/21 Pages) IC-Haus GmbH – 8-BIT Sin/D CONVERTER-PROCESSOR

iC-NG
8-BIT Sin/D CONVERTER-PROCESSOR
Rev D3, Page 18/21
Position Counter Settings
Bit
7
Name
6
5
4
CLC
3
CBZ
2
1
COUNTEN SLCNTEN
Adr: 10
0
SIC
Input Select
Bit 0
0
SIC
1
Enable Select
Bit 1
0
SLCNTEN 1
Enable
Bit 2
0
COUNTEN 1
Reset Enable
Bit 3
0
CBZ
1
Reset
Bit 4
0
CLC
1
The position counter is increased/decreased with each zero crossing
The position counter is increased/decreased with each interpolation step
Count operation is enabled via the COUNTEN register; MFP is an output pin
Count operation is enabled via pin MFP; MFP is an input pin
Position counter is stopped (with SLCNTEN = 0)
Position counter enabled (with SLCNTEN = 0)
Position counter is not reset with a zero pulse
Position counter is reset with every zero pulse
Position counter is not reset
Position counter is reset
Interrupt / Error Message Enable (active high)
Adr: 11
Bit
7
Name
6
5
4
3
2
1
0
LATERR LATINT EN4
EN3
EN2
EN1
EN0
Interrupts are shown active high at pin MFP if this is programmed as an output. Errors are shown active low at pin NER.
Bit 0, EN0
0
1
Disabled
NGUPDT enabled. Status following a reset (message to pin MFP)
Bit 1, EN1
0
1
Disabled
POSCOMP enabled (message to pin MFP)
Bit 2, EN2
0
1
Disabled
MAXFREQ enabled. Status following a reset (Message to pin NER)
Bit 3, EN3
0
1
Disabled
STEPINP enabled (message to pin NER)
Bit 4, EN4
0
1
Disabled
ERRV enabled (message to pin NER)
Bit 5, LATINT 0
1
Interrupts are only shown while the cause for the interrupt persists
Interrupt status is saved (programming 1-0-1 resets the registers of address 6)
Bit 6, LATERR 0
1
Errors are only shown while the cause for the error persists
Error status is saved (programming 1-0-1 resets the registers of address 6)