IC-NG Datasheet, PDF (11/21 Pages) IC-Haus GmbH – 8-BIT Sin/D CONVERTER-PROCESSOR

iC-NG
8-BIT Sin/D CONVERTER-PROCESSOR
Rev D3, Page 11/21
TAN D/A Converter Resolution (per segment)
Resolution
32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17
1 256 248 240 232 224 216 208 200 192 184 176 168 160 152 144 136
"00" [1F] [1E] [1D] [1C]
[1B]
[1A]
[19]
[18]
[17]
[16]
[15]
[14]
[13]
[12]
[11]
[10]
2 128
120
112
104
96
88
80
72
"00" [0F]
[0E]
[0D]
[0C]
[0B]
[0A]
[09]
[08]
4 64
56
48
40
"00" [07]
[06]
[05]
[04]
8 32
24
"00" [03]
[02]
16 16
"00" [01]
32 8
"00" [00]
1 ¹²⁸ 124 ¹²⁰ 116 ¹¹² 108 ¹⁰⁴ 100
96
92
88
84
80
76
72
68
"01" ⁶⁴
60
56
52
48
44
40
36
32
28
24
20
16
12
8
4
2 ⁶⁴ 62 ⁶⁰ 58
56
54
52
50
48
46
44
42
40
38
36
34
"10" ³²
30
28
26
24
22
20
18
16
14
12
10
8
6
4
2
3 ³² 31 ³⁰ 29
28
27
26
25
24
23
22
21
20
19
18
17
"11" ¹⁶
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
Fig. 12: programming the resolution: hexadecimal [1F] for RES(4:0), binary "00" for RES(6:5).
Hysteresis
If the maximum possible converter resolution is not
used, hysteresis can be obtained from free resolution
steps. In so doing, the resolution chosen determines
the number of possible hysteresis settings.
The following are possible in compliance with the up-
per half of the table of resolution printed above:
H
Hysteresis given in % (resistive)
Y
S ^{0 625 12. 187 25 31. 37. 43. 50 56. 62. 68. 75 81. 87. 93. 100}
55
25 5 75 25 5 75 25 5 75
1 - - - - - - - - - - - - - - - - 30
2 20 - - - - - - - - - - - - - - - 30
4 20 - - - - - - - 28 - - - - - - - 30
8 20 - - - 24 - - - 28 - - - 2C - - - 30
16 20 - 22 - 24 - 26 - 28 - 2A - 2C - 2E - 30
32 20 21 22 23 24 25 26 27 28 29 2A 2B 2C 2D 2E 2F 30
Fig. 13: resistive hysteresis.
'-' indicates unauthorized programming.
When setting high converter resolutions which use all
resolution steps, to produce hysteresis the resolution
of the converter is increased in an intermediate step
by switching on a capacitive voltage divider.
Hysteresis can be set in intervals of 5% from 0..95% in
conjunction with the output values given in the upper
half of the above table of resolution (output values are
without a right shift).
Hysteresis given in % (capacitive)
H _{0 5 10 15 20 25 30 35 40 45 50 55 60 65 70 75 80 85 90 95}
Y
S 00 01 02 03 04 05 06 07 10 11 12 13 14 15 16 17 1C 1D 1E 1F
Fig. 14: capacitive hysteresis.