IC-NG Datasheet, PDF (13/21 Pages) IC-Haus GmbH – 8-BIT Sin/D CONVERTER-PROCESSOR

iC-NG
8-BIT Sin/D CONVERTER-PROCESSOR
Rev D3, Page 13/21
Period counter
System clock
The 24-bit position counter can be read via the
COUNT registers (addresses 1..3). Write access is not
possible, yet the counter can be reset by CLC.
Under normal circumstances (SIC= 0), the counter is
increased or decreased by an overflow of the 8-bit
interpolation register NG (address 0), according to the
direction of run. Together with register NG, the output
value is 4 bytes.
The counter stimulus is monitored by the separate
fourfold edge evaluation feature and guarantees that
the count functions perform properly even when input
frequencies are excessively high, provided the phase
does not step by more than 90°. If this is the case,
error flag STEPINP is set.
An internal oscillator is available as a clock generator.
The frequency is determined by an external resistor.
In addition, register FREQ can be used to increase the
clock rate tenfold. This is prudent with a high input
frequency if merely the number of revolutions is to be
determined.
Alternatively, the system clock can be fed in externally.
The frequency should be between 0Hz and fmax and
should not exceed the maximum low pulse duration
(see characteristics), as otherwise the internal clock
oscillator switches in.
CBZ must be set should the counter be reset by the
zero pulse. Counting is enabled by pin MFP
(SLCNTEN= 1) or alternatively by register COUNTEN
(SLCNTEN= 0).
For measurement applications, the position counter
input can also be switched to the interpolated output
pulse (SIC= 1).
Interrupt and error messages
The occurrence of an interrupt or error is indicated in
the interrupt and error status register at address 6.
Using registers LATINT and LATERR (address 11),
the user can decide whether the information is to be
displayed only as long as the interrupt or error persists
or whether this information should be stored.
Pins MFP for interrupts (active high) and NER for er-
rors (active low) are available for message outputs;
authorization for signaling must be granted. Pin MFP
must have output function (SLCNTEN= 0) to enable
displaying.
RPM/Speed acquisition
The TACHO speed data register can be used to ac-
cess a very simple RPM/speed log. The number of
clock pulses between two consecutive output values is
recorded here as a ones complement. The register is
updated with each change in output value. No digital
filtering is performed.