H27U518S2CTR-BC Datasheet, PDF (8/37 Pages) Hynix Semiconductor – 512 Mb NAND Flash

1PrePreliminaryeee
H27U518S2C Series
512 Mbit (64 M x 8 bit) NAND Flash
IO0
IO1
IO2
IO3
IO4
IO5
IO6
IO7
1st Cycle
2nd Cycle
A0
A1
A2
A3
A4
A5
A6
A7
A9
A10
A11
A12
A13
A14
A15
A16
3rd Cycle
A17
A18
A19
A20
A21
A22
A23
A24
4th Cycle
A25
L¹
L¹
L¹
L¹
L¹
L¹
L¹
Table 3 : Address Cycle Map
NOTE
1. L must be set to Low
2. A8 is set to LOW or High by the Read 1 Command(00h or 01h).
Density
1 Gbit
Plane Address
Block Address
Page Address
A25
A24 ~ A14
A13 ~ A9
Table 4 : Address Role
Column Address
A7 ~ A0
FUNCTION
READ 1
READ 2
READ ID
RESET
PAGE PROGRAM
COPY BACK PROGRAM ¹
BLOCK ERASE
READ STATUS REGISTER
1st CYCLE
2nd CYCLE
3rd CYCLE
4th CYCLE
Acceptable command
during busy
00h / 01h
-
-
-
50 h
-
-
-
90h
-
-
-
FFh
-
-
-
Yes
80h
10h
-
-
00h
8Ah
(10h)
-
60h
D0h
-
-
70h
-
-
-
Yes
Table 5 : Command Set
NOTE
1. The program confirm command (10h) can either be excuted or ignored during copy back program
Rev 1.0 / Dec. 2008
8