H27U518S2CTR-BC Datasheet, PDF (13/37 Pages) Hynix Semiconductor – 512 Mb NAND Flash

1PrePreliminaryeee
H27U518S2C Series
512 Mbit (64 M x 8 bit) NAND Flash
3.7 Reset.
The device offers a reset feature, executed by writing FFh to the command register. When the device is in Busy state
during random read, program or erase mode, the reset operation will abort these operations. The contents of memory cells
being altered are no longer valid, as the data will be partially programmed or erased. The command register is cleared to
wait for the next command, and the Status Register is cleared to value E0h when WP is high. Refer to table 14 for device
status after reset operation. If the device is already in reset state a new reset command will not be accepted by the com-
mand register. The R/B pin transitions to low for tRST after the Reset command is written. Refer to Figure 16 below.
Rev 1.0 / Dec. 2008
13