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HMT41GA7MFR8A Datasheet, PDF (46/48 Pages) Hynix Semiconductor – DDR3L SDRAM ECC SO-DIMMs Based on 4Gb M-die
Table 10 - IDD7 Measurement-Loop Patterna)
ATTENTION! Sub-Loops 10-19 have inverse A[6:3] Pattern and Data Pattern than Sub-Loops 0-9
Datab)
00
1
2
...
nRRD
1
nRRD+1
nRRD+2
...
2 2*nRRD
3 3*nRRD
4 4*nRRD
5 nFAW
6 nFAW+nRRD
7 nFAW+2*nRRD
8 nFAW+3*nRRD
9 nFAW+4*nRRD
2*nFAW+0
10 2*nFAW+1
2&nFAW+2
2*nFAW+nRRD
11 2*nFAW+nRRD+1
2&nFAW+nRRD+2
12 2*nFAW+2*nRRD
13 2*nFAW+3*nRRD
14 2*nFAW+4*nRRD
15 3*nFAW
16 3*nFAW+nRRD
17 3*nFAW+2*nRRD
18 3*nFAW+3*nRRD
19 3*nFAW+4*nRRD
ACT 0 0 1 1 0 0 00 0 0 0
RDA 0 1 0 1 0 0 00 1 0 0
D
1 0 0 0 0 0 00 0 0 0
repeat above D Command until nRRD - 1
ACT 0 0 1 1 0 1 00 0 0 F
RDA 0 1 0 1 0 1 00 1 0 F
D
1 0 0 0 0 1 00 0 0 F
repeat above D Command until 2* nRRD - 1
repeat Sub-Loop 0, but BA[2:0] = 2
repeat Sub-Loop 1, but BA[2:0] = 3
D
1 0 0 0 0 3 00 0 0 F
Assert and repeat above D Command until nFAW - 1, if necessary
repeat Sub-Loop 0, but BA[2:0] = 4
repeat Sub-Loop 1, but BA[2:0] = 5
repeat Sub-Loop 0, but BA[2:0] = 6
repeat Sub-Loop 1, but BA[2:0] = 7
D
1 0 0 0 0 7 00 0 0 F
Assert and repeat above D Command until 2* nFAW - 1, if necessary
ACT 0 0 1 1 0 0 00 0 0 F
RDA 0 1 0 1 0 0 00 1 0 F
D
1 0 0 0 0 0 00 0 0 F
Repeat above D Command until 2* nFAW + nRRD - 1
ACT 0 0 1 1 0 1 00 0 0 0
RDA 0 1 0 1 0 1 00 1 0 0
D
1 0 0 0 0 1 00 0 0 0
Repeat above D Command until 2* nFAW + 2* nRRD - 1
repeat Sub-Loop 10, but BA[2:0] = 2
repeat Sub-Loop 11, but BA[2:0] = 3
D
1 0 0 0 0 3 00 0 0 0
Assert and repeat above D Command until 3* nFAW - 1, if necessary
repeat Sub-Loop 10, but BA[2:0] = 4
repeat Sub-Loop 11, but BA[2:0] = 5
repeat Sub-Loop 10, but BA[2:0] = 6
repeat Sub-Loop 11, but BA[2:0] = 7
D
1 0 0 0 0 7 00 0 0 0
Assert and repeat above D Command until 4* nFAW - 1, if necessary
0
-
0 00000000
0
-
0
-
0 00110011
0
-
0
-
0
-
0
-
0 00110011
0
-
0
-
0 00000000
0
-
0
-
0
-
a) DM must be driven LOW all the time. DQS, DQS are used according to RD Commands, otherwise MID-LEVEL.
b) Burst Sequence driven on each DQ signal by Read Command. Outside burst operation, DQ signals are MID-LEVEL.
Rev. 0.1 / Jul. 2012
46