HMT41GA7MFR8A Datasheet, PDF (22/48 Pages) Hynix Semiconductor – DDR3L SDRAM ECC SO-DIMMs Based on 4Gb M-die

AC & DC Output Measurement Levels
Single Ended AC and DC Output Levels
Table below shows the output levels used for measurements of single ended signals.
Single-ended AC and DC Output Levels
Symbol
V_OH(DC)
V_OM(DC)
V_OL(DC)
V_OH(AC)
V_OL(AC)
Notes:
Parameter
DC output high measurement level (for IV curve linearity)
DC output mid measurement level (for IV curve linearity)
DC output low measurement level (for IV curve linearity)
AC output high measurement level (for output SR)
AC output low measurement level (for output SR)
DDR3L-800, 1066,
1333 and 1600
0.8 x V_DDQ
0.5 x V_DDQ
0.2 x V_DDQ
V_TT + 0.1 x V_DDQ
V_TT - 0.1 x V_DDQ
Unit
V
V
V
V
V
Notes
1
1
1. The swing of ±0.1 x V_DDQ is based on approximately 50% of the static single ended output high or low
swing with a driver impedance of 40 Ω and an effective test load of 25 Ω to V_TT = V_DDQ / 2.
Differential AC and DC Output Levels
Table below shows the output levels used for measurements of single ended signals.
Differential AC and DC Output Levels
Symbol
V_{OHdiff (AC)}
V_{OLdiff (AC)}
Notes:
Parameter
DDR3L-800, 1066,
1333 and 1600
AC differential output high measurement level (for output SR)
+ 0.2 x V_DDQ
AC differential output low measurement level (for output SR)
- 0.2 x V_DDQ
Unit
V
V
Notes
1
1
1. The swing of ±0.2 x V_DDQ is based on approximately 50% of the static differential output high or low
swing with a driver impedance of 40 Ω and an effective test load of 25 Ω to V_TT = V_DDQ/2 at each of the
differential outputs.
Rev. 0.1 / Jul. 2012
22