HMT351U6MFR8C-S6 Datasheet, PDF (26/47 Pages) Hynix Semiconductor – 240pin DDR3 SDRAM Unbuffered DIMMs

HMT351U6MFR8C
HMT351U7MFR8C
6.5.2 Clock,Data,Strobe and Mask Overshoot and Undershoot Specifications
Description
Maximum peak amplitude allowed for
overshoot area (see Figure)
Maximum peak amplitude allowed for
undershoot area (see Figure)
Maximum overshoot area above VDDQ
(See Figure)
Maximum undershoot area below VSSQ
(See Figure)
DDR3-800
0.4V
0.4V
0.25 V-ns
0.25 V-ns
Specification
DDR3-1066
0.4V
0.4V
0.19 V-ns
0.19 V-ns
DDR3-1333
0.4V
0.4V
0.15 V-ns
0.15 V-ns
< Table 6.5.2: AC Overshoot/Undershoot Specification for Clock, Data, Strobe and Mask >
M axim um Am plitude
Overshoot Area
V o lts
(V)
VDDQ
VSSQ
M axim um Am plitude
Tim e (ns)
Undershoot Area
Clock, Data Strobe and M ask Overshoot and Undershoot Definition
< Figure 6.5.2: Clock, Data, Strobe and Mask Overshoot and Undershoot Definition >
Rev. 0.3 / Jan 2009
26