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HY29LV160 Datasheet, PDF (1/48 Pages) Hynix Semiconductor – 16 Mbit (2M x 8/1M x 16) Low Voltage Flash Memory | |||
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HY29LV160
16 Mbit (2M x 8/1M x 16) Low Voltage Flash Memory
KEY FEATURES
n Single Power Supply Operation
â Read, program and erase operations from
2.7 to 3.6 volts
â Ideal for battery-powered applications
n High Performance
â 70, 80, 90 and 120 ns access time
versions
n Ultra-low Power Consumption (Typical
Values At 5 Mhz)
â Automatic sleep mode current: 1 µA
â Standby mode current: 1 µA
â Read current: 9 mA
â Program/erase current: 20 mA
n Flexible Sector Architecture:
â One 16 KB, two 8 KB, one 32 KB and
thirty-one 64 KB sectors in byte mode
â One 8 KW, two 4 KW, one 16 KW and
thirty-one 32 KW sectors in word mode
â Top or bottom boot block configurations
available
n Sector Protection
â Allows locking of a sector or sectors to
prevent program or erase operations
within that sector
â Sectors lockable in-system or via
programming equipment
â Temporary Sector Unprotect allows
changes in locked sectors (requires high
voltage on RESET# pin)
n Fast Program and Erase Times
â Sector erase time: 0.25 sec typical for
each sector
â Chip erase time: 8 sec typical
â Byte program time: 9 µs typical
n Unlock Bypass Program Command
â Reduces programming time when issuing
multiple program command sequences
n Automatic Erase Algorithm Preprograms
and Erases Any Combination of Sectors
or the Entire Chip
n Erase Suspend/Erase Resume
â Suspends an erase operation to allow
reading data from, or programming data
to, a sector that is not being erased
â Erase Resume can then be invoked to
complete suspended erasure
n Automatic Program Algorithm Writes and
Verifies Data at Specified Addresses
n 100,000 Write Cycles per Sector Minimum
n Data# Polling and Toggle Bits
â Provide software confirmation of
completion of program and erase
operations
n Ready/Busy# Pin
â Provides hardware confirmation of
completion of program and erase
operations
n Hardware Reset Pin (RESET#) Resets the
Device to Reading Array Data
n Compliant With Common Flash Memory
Interface (CFI) Specification
â Flash device parameters stored directly
on the device
â Allows software driver to identify and use
a variety of different current and future
Flash products
n Compatible With JEDEC standards
â Pinout and software compatible with
single-power supply Flash devices
â Superior inadvertent write protection
n Space Efficient Packaging
â 48-pin TSOP and 48-ball FBGA packages
LOGIC DIAGRAM
20
A[19:0]
CE#
OE#
WE#
RESET#
BYTE#
8
DQ[7:0]
7
DQ[14:8]
DQ15/A-1
RY/BY#
Preliminary
Revision 1.2, May 2001
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