HD66740 Datasheet, PDF (27/95 Pages) Hitachi Semiconductor – 112 x 80-dot Graphics LCD Controller/Driver

HD66740
Vertical Scroll Control 1/2
SN3-0: Set SN2 to SN0 bits when SW = 0. Set the SN3 bit when SW = 1. Specify the display start
line output from COM1. Because the CGRAM is assigned a 10-line display area, the data is displayed
sequentially from the first line to the 10th line then repeated from the first line again. In partial smooth
scrolling, these bits specify the display start line for the next line of the fixed-display line. For details,
see the Partial Smooth Scroll Display Function section.
SL2–0: Select the top raster-row to be displayed (display-start raster-row) in the display-start line
specified by SN2 to SN0. Any raster-row from the first to eighth can be selected (table 12). This function
is used to achieve vertical smooth scrolling together with SN2 to SN0. For details, see the Vertical
Smooth Scroll section.
R/W RS DB7 DB6 DB5 DB4 DB3 DB2 DB1 DB0
SN2 SN1 SN0 (SW = 0)
0 0 0 1 0 0 1 _{<0> <0> SN3 (SW = 1)}
SL2 SL1 SL0 _{(SW = 0)}
0 0 0 1 0 1 0 _{<0> PS1 PS0 (SW = 1)}
Figure 10 Vertical Scroll Control 1/2 Instruction
Table 11 SN Bits and Display-start Lines
SN3
SN2
SN1
SN0
Display-start Line
0
0
0
0
1st line
0
0
0
1
2nd line
0
0
1
0
3rd line
0
0
1
1
4th line
0
1
0
0
5th line
0
1
0
1
6th line
0
1
1
0
7th line
0
1
1
1
8th line
1
0
0
0
9th line
1
0
0
1
10th line
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