GS81313LT18 Datasheet, PDF (19/29 Pages) GSI Technology – 144Mb SigmaDDR-IIIe™ Burst of 2 ECCRAM™

GS81313LT18/36GK-833/714/625
AC Timing Specifications (variable with device speed grade)
Parameter
Symbol
–833
Min Max
–714
Min Max
–625
Min Max
Units Notes
Clk Cycle Time
Input Clock Timing
t_KHKH
1.2
6.0
1.4
6.0
1.6
6.0
ns
1
Input Setup, Hold, and Pulse Width Timing
Input Valid to Clk High
t_IVKH
150
—
150
—
160
—
ps
2
Clk High to Input Hold
t_KHIX
150
—
150
—
160
—
ps
2
Input Pulse Width
t_IPW
200
—
200
—
200
—
ps
2,3
Notes:
All parameters are measured from the mid-point of the object signal to the mid-point of the reference signal.
1. Parameters apply to CK, CK, KD, KD.
2. Parameters apply to SA, and are referenced to CK.
Parameters apply to LD, R/W, and are referenced to CK.
Parameters apply to DQ, and are referenced to KD & KD.
3. Parameter specifies input pulse width requirements for each individual address, control, and data input. Per-pin deskew must be per-
formed, to center the valid window of each individual input around the clock edge that latches it, in order for these parameters to be rele-
vant to the application. The parameter is not tested; it is guaranteed by design and verified through extensive corner-lot characterization.
Rev: 1.13 7/2016
19/29
Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.
© 2014, GSI Technology