GS81313LT18 Datasheet, PDF(13/29 Page) GSI Technology – 144Mb SigmaDDR-IIIe™ Burst of 2 ECCRAM™

English

English German Russian Spanish Italian Polish Chinese Japanese Korean French Portuguese	Language :

GS81313LT18 Datasheet, PDF (13/29 Pages) GSI Technology – 144Mb SigmaDDR-IIIe™ Burst of 2 ECCRAM™

◁

GS81313LT18/36GK-833/714/625

Driver Impedance Control

Programmable Driver Impedance is implemented on the following output signals:

â¢ CQ, CQ, DQ, QVLD.

Driver impedance is programmed by connecting an external resistor RQ between the ZQ pin and VSS.

Driver impedance is set to the programmed value within 160K cycles after input clocks are operating within specification and RST

is de-asserted Low. It is updated periodically thereafter to compensate for temperature and voltage fluctuations in the system.

Output Signal

Pull-Down Impedance (ROUTL)

CQ, CQ, DQ, QVLD

RQ*0.2 ï± 15%

Notes:

1. ROUTL and ROUTH apply when 175ïï ï£ RQ ï£ 225ïï®.

2. The mismatch between ROUTL and ROUTH is less than 10%, guaranteed by design.

Pull-Up Impedance (ROUTH)

RQ*0.2 ï± 15%

ODT Impedance Control

Programmable ODT Impedance is implemented on the following input signals:

â¢ CK, CK, KD, KD, SA, LD, R/W, DQ.

ODT impedance is programmed by connecting an external resistor RT between the ZT pin and VSS.

ODT impedance is set to the programmed value within 160K cycles after input clocks are operating within specification and RST

is de-asserted Low. It is updated periodically thereafter to compensate for temperature and voltage fluctuations in the system

Input Signal

PZT[1:0] MZT[1:0] Pull-Down Impedance (RINL)

disabled

CK, CK, KD, KD

RT ï± 15%

RT*2 ï± 20%

disabled

SA, LD, R/W

RT ï± 15%

RT*2 ï± 20%

RT ï± 15%

RT*2 ï± 20%

Notes:

1. When MZT[1:0] = 00, ODT is disabled on all inputs. MZT[1:0] = 11 is reserved for future use.

2. RINL and RINH apply when 105ïï ï£ RT ï£ 135ïï®

3. The mismatch between RINL and RINH is less than 10%, guaranteed by design.

4. All ODT is disabled during JTAG EXTEST and SAMPLE-Z instructions.

Pull-Up Impedance (RINH)

disabled

RT ï± 15%

RT*2 ï± 20%

disabled

RT ï± 15%

RT*2 ï± 20%

RT ï± 15%

RT*2 ï± 20%

Note: When ODT impedance is enabled on a particular input, that input should always be driven High or Low; it should never be

tri-stated (i.e., in a High- Z state). If the input is tri-stated, the ODT will pull the signal to VDDQ / 2 (i.e., to the switch point of the

diff-amp receiver), which could cause the receiver to enter a meta-stable state and consume more power than it normally would.

This could result in the deviceâs operating currents being higher.

Rev: 1.13 7/2016

13/29

Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com.

▷