M68HC12B Datasheet, PDF (96/334 Pages) Freescale Semiconductor, Inc – Microcontrollers

EEPROM
MARG — Program and Erase Voltage Margin Test Enable Bit
0 = Normal operation
1 = Program and erase margin test
This bit is used to evaluate the program/erase voltage margin.
EECPD — Charge Pump Disable Bit
0 = Charge pump is turned on during program/erase.
1 = Disable charge pump.
EECPRD — Charge Pump Ramp Disable Bit
0 = Charge pump is turned on progressively during program/erase.
1 = Disable charge pump controlled ramp up.
Known to enhance write/erase endurance of EEPROM cells.
EECPM — Charge Pump Monitor Enable Bit
0 = Normal operation
1 = Output the charge pump voltage on the IRQ/V_PP pin.
7.3.4 EEPROM Control Register
Address: $00F3
Bit 7
6
Read:
BULKP
0
Write:
Reset: 1
0
5
4
3
2
1
0
BYTE
ROW ERASE EELAT
0
0
0
0
0
Figure 7-5. EEPROM Control Register (EEPROG)
Bit 0
EEPGM
0
BULKP — Bulk Erase Protection Bit
0 = EEPROM can be bulk erased.
1 = EEPROM is protected from being bulk or row erased.
Read anytime. Write anytime if EEPGM = 0 and PROTLCK = 0.
BYTE — Byte and Aligned Word Erase Bit
0 = Bulk or row erase is enabled.
1 = One byte or one aligned word erase only
Read anytime. Write anytime if EEPGM = 0.
ROW — Row or Bulk Erase Bit (when BYTE = 0)
0 = Erase entire EEPROM array.
1 = Erase only one 32-byte row.
Read anytime. Write anytime if EEPGM = 0.
BYTE and ROW have no effect when ERASE = 0.
Table 7-2. Erase Selection
BYTE
0
0
1
1
ROW
0
1
0
1
Block Size
Bulk erase entire EEPROM array
Row erase 32 bytes
Byte or aligned word erase
Byte or aligned word erase
M68HC12B Family Data Sheet, Rev. 9.1
96
Freescale Semiconductor