M68HC12B Datasheet, PDF (87/334 Pages) Freescale Semiconductor, Inc – Microcontrollers

6.3.3 Port B Data Register
Registers
Address: $0001
Bit 7
6
5
4
3
2
Read:
PB7
PB6
PB5
PB4
PB3
PB2
Write:
Reset:
Alternate functions:
Expanded wide and peripheral:
Expanded narrow:
ADDR7
DATA7
ADDR7
ADDR6
DATA6
ADDR6
ADDR5
DATA5
ADDR5
Unaffected by reset
ADDR4
DATA4
ADDR4
ADDR3
DATA3
ADDR3
ADDR2
DATA2
ADDR2
Figure 6-3. Port B Data Register (PORTB)
1
PB1
ADDR1
DATA1
ADDR1
Bit 0
PB0
ADDR0
DATA0
ADDR0
Read: Anytime, if register is in the map
Write: Anytime, if register is in the map
Bits PB7–PB0 are associated with addresses ADDR7–ADDR0 and DATA7–DATA0. When port B is not
used for external addresses and data such as in single-chip mode, these pins can be used as
general-purpose I/O. DDRB determines the primary direction of each pin. This register is not in the
on-chip map in expanded and peripheral modes.
6.3.4 Port B Data Direction Register
Address: $0003
Read:
Write:
Reset:
Bit 7
DDB7
0
6
DDB6
0
5
DDB5
0
4
DDB4
0
3
DDB3
0
2
DDB2
0
1
DDB1
0
Figure 6-4. Port B Data Direction Register (DDRB)
Bit 0
DDB0
0
Read: Anytime, if register is in the map
Write: Anytime, if register is in the map
This register determines the primary direction for each port B pin when functioning as a general-purpose
I/O port. DDRB is not in the on-chip map in expanded and peripheral modes.
1 = Associated pin is an output.
0 = Associated pin is a high-impedance input.
M68HC12B Family Data Sheet, Rev. 9.1
Freescale Semiconductor
87