MC9S08SH32 Datasheet, PDF (88/328 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 6 Parallel Input/Output Control
6.6.2.5 Port B Drive Strength Selection Register (PTBDS)
7
R
PTBDS7
W
6
PTBDS6
5
PTBDS5
4
PTBDS4
3
PTBDS3
2
PTBDS2
1
PTBDS1
Reset:
0
0
0
0
0
0
0
Figure 6-15. Drive Strength Selection for Port B Register (PTBDS)
Table 6-14. PTBDS Register Field Descriptions
0
PTBDS0
0
Field
Description
7:0
PTBDS[7:0]
Output Drive Strength Selection for Port B Bits — Each of these control bits selects between low and high
output drive for the associated PTB pin. For port B pins that are configured as inputs, these bits have no effect.
0 Low output drive strength selected for port B bit n.
1 High output drive strength selected for port B bit n.
6.6.2.6 Port B Interrupt Status and Control Register (PTBSC)
R
W
Reset:
7
6
5
4
3
2
1
0
0
0
0
0
PTBIF
0
PTBIE
PTBMOD
PTBACK
0
0
0
0
0
0
0
0
Figure 6-16. Port B Interrupt Status and Control Register (PTBSC)
Table 6-15. PTBSC Register Field Descriptions
Field
Description
3
PTBIF
Port B Interrupt Flag — PTBIF indicates when a Port B interrupt is detected. Writes have no effect on PTBIF.
0 No Port B interrupt detected.
1 Port B interrupt detected.
2
Port B Interrupt Acknowledge — Writing a 1 to PTBACK is part of the flag clearing mechanism. PTBACK
PTBACK always reads as 0.
1
PTBIE
Port B Interrupt Enable — PTBIE determines whether a port B interrupt is enabled.
0 Port B interrupt request not enabled.
1 Port B interrupt request enabled.
0
PTBMOD
Port B Detection Mode — PTBMOD (along with the PTBES bits) controls the detection mode of the port B
interrupt pins.
0 Port B pins detect edges only.
1 Port B pins detect both edges and levels.
MC9S08SH32 Series Data Sheet, Rev. 2
88
Freescale Semiconductor
PRELIMINARY