MC9S08SH32 Datasheet, PDF (149/328 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 10
Inter-Integrated Circuit (S08IICV2)
10.1 Introduction
The inter-integrated circuit (IIC) provides a method of communication between a number of devices. The
interface is designed to operate up to 100 kbps with maximum bus loading and timing. The device is
capable of operating at higher baud rates, up to a maximum of clock/20, with reduced bus loading. The
maximum communication length and the number of devices that can be connected are limited by a
maximum bus capacitance of 400 pF.
NOTE
The SDA and SCL should not be driven above V_DD. These pins are pseudo
open-drain containing a protection diode to V_DD.
10.1.1 Module Configuration
The IIC module pins, SDA and SCL can be repositioned under software control using IICPS in SOPT1 as
as shown in Table 10-1. IICPS in SOPT1 selects which general-purpose I/O ports are associated with IIC
operation.
Table 10-1. IIC Position Options
IICPS in SOPT1
0 (default)
1
Port Pin for SDA
PTA2
PTB6
Port Pin for SCL
PTA3
PTB7
Figure 10-1 shows the MC9S08SH32 Series block diagram with the IIC module highlighted.
MC9S08SH32 Series Data Sheet, Rev. 2
Freescale Semiconductor
149
PRELIMINARY