MC9S08SH32 Datasheet, PDF (27/328 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 2 Pins and Connections
2.2.3 RESET
After a power-on reset (POR), the PTA5/IRQ/TCLK/RESET pin defaults to a general-purpose I/O port
pin, PTA5. Setting RSTPE in SOPT1 configures the pin to be the RESET pin with an open-drain drive
containing an internal pull-up device. After configured as RESET, the pin will remain RESET until the
next POR. The RESET pin when enabled can be used to reset the MCU from an external source when the
pin is driven low.
Internal power-on reset and low-voltage reset circuitry typically make external reset circuitry unnecessary.
This pin is normally connected to the standard 6-pin background debug connector so a development
system can directly reset the MCU system. If desired, a manual external reset can be added by supplying
a simple switch to ground (pull reset pin low to force a reset).
Whenever any non-POR reset is initiated (whether from an external signal or from an internal system), the
RESET pin if enabled is driven low for about 66 bus cycles. The reset circuitry decodes the cause of reset
and records it by setting a corresponding bit in the system reset status register (SRS).
NOTE
This pin does not contain a clamp diode to V_DD and should not be driven
above V_DD.
The voltage measured on the internally pulled up RESET pin will not be
pulled to V_DD. The internal gates connected to this pin are pulled to V_DD. If
the RESET pin is required to drive to a V_DD level an external pullup should
be used.
NOTE
In EMC-sensitive applications, an external RC filter is recommended on the
RESET pin. See Figure 2-4 for an example.
2.2.4 Background / Mode Select (BKGD/MS)
During a power-on-reset (POR) or background debug force reset (see Section 5.7.3, “System Background
Debug Force Reset Register (SBDFR),” for more information), the PTA4/ACMPO/BKGD/MS pin
functions as a mode select pin. Immediately after any reset, the pin functions as the background pin and
can be used for background debug communication. When enabled as the BKGD/MS pin (BKGDPE = 1),
an internal pullup device is automatically enabled.
The background debug communication function is enabled when BKGDPE in SOPT1 is set. BKGDPE is
set following any reset of the MCU and must be cleared to use the PTA4/ACMPO/BKGD/MS pin’s
alternative pin function.
If nothing is connected to this pin, the MCU will enter normal operating mode at the rising edge of the
internal reset after a POR or force BDC reset. If a debug system is connected to the 6-pin standard
background debug header, it can hold BKGD/MS low during a POR or immediately after issuing a
background debug force reset, which will force the MCU to active background mode.
MC9S08SH32 Series Data Sheet, Rev. 2
Freescale Semiconductor
27
PRELIMINARY