MC68HC908JL3 Datasheet, PDF (76/180 Pages) Freescale Semiconductor, Inc – Microcontrollers

Monitor ROM (MON)
7.3.3 Data Format
Communication with the monitor ROM is in standard non-return-to-zero (NRZ) mark/space data format.
(See Figure 7-3 and Figure 7-4.)
START
BIT BIT 0
BIT 1 BIT 2 BIT 3 BIT 4 BIT 5 BIT 6 BIT 7
Figure 7-3. Monitor Data Format
NEXT
START
STOP BIT
BIT
$A5
BREAK
START
BIT
START
BIT
BIT 0 BIT 1 BIT 2 BIT 3 BIT 4 BIT 5 BIT 6 BIT 7 STOP
BIT
STOP
BIT 0 BIT 1 BIT 2 BIT 3 BIT 4 BIT 5 BIT 6 BIT 7 BIT
Figure 7-4. Sample Monitor Waveforms
NEXT
START
BIT
NEXT
START
BIT
The data transmit and receive rate can be anywhere from 4800 baud to 28.8k-baud. Transmit and receive
baud rates must be identical.
7.3.4 Echoing
As shown in Figure 7-5, the monitor ROM immediately echoes each received byte back to the PTB0 pin
for error checking.
SENT TO
MONITOR
READ
READ ADDR. HIGH ADDR. HIGH ADDR. LOW ADDR. LOW DATA
ECHO
RESULT
Figure 7-5. Read Transaction
Any result of a command appears after the echo of the last byte of the command.
7.3.5 Break Signal
A start bit followed by nine low bits is a break signal. (See Figure 7-6.) When the monitor receives a break
signal, it drives the PTB0 pin high for the duration of two bits before echoing the break signal.
MISSING STOP BIT
TWO-STOP-BIT DELAY BEFORE ZERO ECHO
01234567
01234567
Figure 7-6. Break Transaction
MC68HC908JL3E Family Data Sheet, Rev. 4
76
Freescale Semiconductor