MC68HC908JL3 Datasheet, PDF (25/180 Pages) Freescale Semiconductor, Inc – Microcontrollers

Monitor ROM
Addr.
Register Name
$0027
Read:
TIM Channel 0 Register Low
(TCH0L)
Write:
Reset:
$0028
Read:
TIM Channel 1 Status and
Control Register (TSC1)
Write:
Reset:
Read:
$0029
TIM Channel 1 Register High
(TCH1H)
Write:
Reset:
$002A
Read:
TIM Channel 1 Register Low
(TCH1L)
Write:
Reset:
$002B
↓
$003B
Read:
Unimplemented ^Write:
Bit 7
Bit7
CH1F
0
0
Bit15
Bit7
$003C
$003D
$003E
$003F
Read:
ADC Status and Control
Register (ADSCR)
Write:
Reset:
Read:
ADC Data Register
(ADR)
Write:
Reset:
Read:
ADC Input Clock Register
(ADICLK)
Write:
Reset:
Read:
Unimplemented Write:
COCO
0
AD7
ADIV2
0
6
Bit6
CH1IE
0
Bit14
Bit6
AIEN
0
AD6
ADIV1
0
5
4
3
2
Bit5
Bit4
Bit3
Bit2
Indeterminate after reset
0
MS1A ELS1B ELS1A
0
0
0
0
Bit13
Bit12
Bit11
Bit10
Indeterminate after reset
Bit5
Bit4
Bit3
Bit2
Indeterminate after reset
1
Bit 0
Bit1
Bit0
TOV1
0
Bit9
CH1MAX
0
Bit8
Bit1
Bit0
ADCO
0
AD5
ADCH4
1
AD4
ADCH3
1
AD3
ADCH2
1
AD2
ADCH1
1
AD1
ADCH0
1
AD0
Indeterminate after reset
0
0
0
0
0
ADIV0
0
0
0
0
0
0
Read:
SBSW
$FE00
Break Status Register
(BSR)
Write:
R
R
R
R
R
R
R
See note
Reset:
0
Note: Writing a 0 clears SBSW.
Read: POR
PIN
COP
ILOP
ILAD MODRST LVI
0
$FE01
Reset Status Register
(RSR)
Write:
POR: 1
0
0
0
0
0
0
0
$FE02
Read:
R
R
R
R
R
R
R
R
Reserved Write:
$FE03
Read:
Break Flag Control
Register (BFCR)
Write:
BCFE
R
R
R
R
R
R
R
Reset: 0
= Unimplemented
R = Reserved
Figure 2-2. Control, Status, and Data Registers (Sheet 3 of 4)
MC68HC908JL3E Family Data Sheet, Rev. 4
Freescale Semiconductor
25