MC68HC908JL3 Datasheet, PDF (63/180 Pages) Freescale Semiconductor, Inc – Microcontrollers

SIM Registers
2OSCOUT
STOP RECOVERY PERIOD
INT/BREAK
IAB
STOP +1
STOP + 2 STOP + 2
SP
SP – 1
SP – 2
SP – 3
Figure 5-19. Stop Mode Recovery from Interrupt or Break
5.7 SIM Registers
The SIM has three memory mapped registers. Table 5-4 shows the mapping of these registers.
Table 5-4. SIM Registers
Address
$FE00
$FE01
$FE03
Register
BSR
RSR
BFCR
Access Mode
User
User
User
5.7.1 Break Status Register (BSR)
The break status register contains a flag to indicate a break caused by an exit from wait mode.
Address: $FE00
Bit 7
6
5
4
3
2
1
Bit 0
Read:
SBSW
R
Write:
R
R
R
R
R
Note⁽¹⁾
R
Reset:
0
R = Reserved
1. Writing a zero clears SBSW.
Figure 5-20. Break Status Register (BSR)
SBSW — SIM Break Stop/Wait
SBSW can be read within the break state SWI routine. The user can modify the return address on the
stack by subtracting one from it.
1 = Wait mode was exited by break interrupt
0 = Wait mode was not exited by break interrupt
MC68HC908JL3E Family Data Sheet, Rev. 4
Freescale Semiconductor
63