MC9S08DN60_08 Datasheet, PDF (68/356 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 5 Resets, Interrupts, and General System Control
Table 5-1. Vector Summary¹
Vector
No.
Address
(High/Low)
Vector
Name
Module
Source
Enable
Description
31
30
29–26
25
24
23
22
21–19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
0xFFC0/0xFFC1
0xFFC2/0xFFC3
0xFFC4/0xFFC5–
0xFFCA/0xFFCB
0xFFCC/0xFFCD
0xFFCE/0xFFCF
0xFFD0/0xFFD1
0xFFD2/0xFFD3
0xFFD4/0xFFD5–
0xFFD8/0xFFD9
0xFFDA/0xFFDB
0xFFDC/0xFFDD
0xFFDE/0xFFDF
0xFFE0/0xFFE1
0xFFE2/0xFFE3
0xFFE4/0xFFE5
0xFFE6/0xFFE7
0xFFE8/0xFFE9
0xFFEA/0xFFEB
0xFFEC/0xFFED
0xFFEE/0xFFEF
0xFFF0/0xFFF1
0xFFF2/0xFFF3
0xFFF4/0xFFF5
0xFFF6/0xFFF7
0xFFF8/0xFFF9
0xFFFA/0xFFFB
0xFFFC/0xFFFD
0xFFFE/0xFFFF
Vacmp2 ACMP2
ACF
Vacmp1 ACMP1
ACF
ACIE
ACIE
Analog comparator 2
Analog comparator 1
(Reserved)
Vrtc
Viic
Vadc
Vport
RTC
IIC
ADC
Port A,B,D
RTIF
IICIS
COCO
PTAIF, PTBIF,
PTDIF
RTIE
IICIE
AIEN
PTAIE, PTBIE, PTDIE
Real-time interrupt
IIC control
ADC
Port Pins
(Reserved)
Vsci1tx
Vsci1rx
Vsci1err
Vspi
Vtpm2ovf
Vtpm2ch1
Vtpm2ch0
Vtpm1ovf
Vtpm1ch5
Vtpm1ch4
Vtpm1ch3
Vtpm1ch2
Vtpm1ch1
Vtpm1ch0
Vlol
Vlvd
Virq
Vswi
Vreset
SCI1
SCI1
SCI1
SPI
TPM2
TPM2
TPM2
TPM1
TPM1
TPM1
TPM1
TPM1
TPM1
TPM1
MCG
System
control
IRQ
Core
System
control
TDRE, TC
IDLE, LBKDIF,
RDRF, RXEDGIF
OR, NF,
FE, PF
SPIF, MODF,
SPTEF
TOF
CH1F
CH0F
TOF
CH5F
CH4F
CH3F
CH2F
CH1F
CH0F
LOLS
LVWF
TIE, TCIE
ILIE, LBKDIE, RIE,
RXEDGIE
ORIE, NFIE,
FEIE, PFIE
SPIE, SPIE, SPTIE
TOIE
CH1IE
CH0IE
TOIE
CH5IE
CH4IE
CH3IE
CH2IE
CH1IE
CH0IE
LOLIE
LVWIE
IRQF
SWI Instruction
COP,
LOC,
LVD,
RESET,
ILOP,
ILAD,
POR,
BDFR
IRQIE
—
COPE
CME
LVDRE
—
—
—
—
—
SCI1 transmit
SCI1 receive
SCI1 error
SPI
TPM2 overflow
TPM2 channel 1
TPM2 channel 0
TPM1 overflow
TPM1 channel 5
TPM1 channel 4
TPM1 channel 3
TPM1 channel 2
TPM1 channel 1
TPM1 channel 0
MCG loss of lock
Low-voltage warning
IRQ pin
Software interrupt
Watchdog timer
Loss-of-clock
Low-voltage detect
External pin
Illegal opcode
Illegal address
Power-on-reset
BDM-forced reset
1 _{Vector priority is shown from lowest (first row) to highest (last row). For example, Vreset is the highest priority vector.}
5.6 Low-Voltage Detect (LVD) System
The MC9S08DN60 Series includes a system to protect against low-voltage conditions in order to protect
memory contents and control MCU system states during supply voltage variations. The system is
MC9S08DN60 Series Data Sheet, Rev 3
68
Freescale Semiconductor