MC9S08DN60_08 Datasheet, PDF (236/356 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 13 Serial Communications Interface (S08SCIV4)
Field
3
WAKE
2
ILT
1
PE
0
PT
Table 13-3. SCI1C1 Field Descriptions (continued)
Description
Receiver Wakeup Method Select — Refer to Section 13.3.3.2, “Receiver Wakeup Operation” for more
information.
0 Idle-line wakeup.
1 Address-mark wakeup.
Idle Line Type Select — Setting this bit to 1 ensures that the stop bit and logic 1 bits at the end of a character
do not count toward the 10 or 11 bit times of logic high level needed by the idle line detection logic. Refer to
Section 13.3.3.2.1, “Idle-Line Wakeup” for more information.
0 Idle character bit count starts after start bit.
1 Idle character bit count starts after stop bit.
Parity Enable — Enables hardware parity generation and checking. When parity is enabled, the most significant
bit (MSB) of the data character (eighth or ninth data bit) is treated as the parity bit.
0 No hardware parity generation or checking.
1 Parity enabled.
Parity Type — Provided parity is enabled (PE = 1), this bit selects even or odd parity. Odd parity means the total
number of 1s in the data character, including the parity bit, is odd. Even parity means the total number of 1s in
the data character, including the parity bit, is even.
0 Even parity.
1 Odd parity.
13.2.3 SCI Control Register 2 (SCI1C2)
This register can be read or written at any time.
R
W
Reset
Field
7
TIE
6
TCIE
5
RIE
4
ILIE
7
6
5
4
3
2
TIE
TCIE
RIE
ILIE
TE
RE
0
0
0
0
0
0
Figure 13-7. SCI Control Register 2 (SCI1C2)
Table 13-4. SCI1C2 Field Descriptions
Description
Transmit Interrupt Enable (for TDRE)
0 Hardware interrupts from TDRE disabled (use polling).
1 Hardware interrupt requested when TDRE flag is 1.
Transmission Complete Interrupt Enable (for TC)
0 Hardware interrupts from TC disabled (use polling).
1 Hardware interrupt requested when TC flag is 1.
Receiver Interrupt Enable (for RDRF)
0 Hardware interrupts from RDRF disabled (use polling).
1 Hardware interrupt requested when RDRF flag is 1.
Idle Line Interrupt Enable (for IDLE)
0 Hardware interrupts from IDLE disabled (use polling).
1 Hardware interrupt requested when IDLE flag is 1.
1
RWU
0
0
SBK
0
MC9S08DN60 Series Data Sheet, Rev 3
236
Freescale Semiconductor