K51P81M100SF2 Datasheet, PDF (67/70 Pages) Freescale Semiconductor, Inc – Up to 100 MHz ARM Cortex-M4 core with DSP instructions delivering 1.25 Dhrystone MIPS per MHz

81 80
MAP LQF
BGA P
Pin Name
Default
• 77 PTD4
LCD_P44
ALT0
LCD_P44
ALT1
PTD4
• 78 PTD5
• 79 PTD6
• — VSS
• 80 PTD7
LCD_P45/ LCD_P45/ PTD5
ADC0_SE6 ADC0_SE6
b
b
LCD_P46/ LCD_P46/ PTD6
ADC0_SE7 ADC0_SE7
b
b
VSS
VSS
LCD_P47 LCD_P47 PTD7
ALT2
ALT3
ALT4
SPI0_PCS1
SPI0_PCS2
UART0_RT
S_b
UART0_CT
S_b
FTM0_CH4
FTM0_CH5
SPI0_PCS3 UART0_RX FTM0_CH6
CMT_IRO UART0_TX FTM0_CH7
ALT5
ALT6
ALT7
EWM_IN LCD_P44
EWM_OUT LCD_P45
_b
FTM0_FLT0 LCD_P46
FTM0_FLT1 LCD_P47
Pinout
EzPort
8.2 K51 Pinouts
The below figure shows the pinout diagram for the devices supported by this document.
Many signals may be multiplexed onto a single pin. To determine what signals can be
used on which pin, see the previous section.
NOTE
The 81 MAPBGA ballmap assignments are currently being
developed.
K51 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011.
Freescale Semiconductor, Inc.
Preliminary
67