K51P81M100SF2 Datasheet, PDF (64/70 Pages) Freescale Semiconductor, Inc – Up to 100 MHz ARM Cortex-M4 core with DSP instructions delivering 1.25 Dhrystone MIPS per MHz

Pinout
81 80 Pin Name Default
ALT0
ALT1
ALT2
ALT3
ALT4
ALT5
ALT6
ALT7
EzPort
MAP LQF
BGA P
• 17 VREFL VREFL VREFL
• 18 VSSA
VSSA
VSSA
• 19 ADC1_SE1 ADC1_SE1 ADC1_SE1
6/
6/
6/
OP1_OUT/ OP1_OUT/ OP1_OUT/
ADC0_SE2 ADC0_SE2 ADC0_SE2
2/OP0_DP2/ 2/OP0_DP2/ 2/OP0_DP2/
OP1_DP2 OP1_DP2 OP1_DP2
• 20 ADC0_SE1 ADC0_SE1 ADC0_SE1
6/
6/
6/
OP0_OUT/ OP0_OUT/ OP0_OUT/
CMP1_IN2/ CMP1_IN2/ CMP1_IN2/
ADC0_SE2 ADC0_SE2 ADC0_SE2
1/OP0_DP1/ 1/OP0_DP1/ 1/OP0_DP1/
OP1_DP1 OP1_DP1 OP1_DP1
• 21 VREF_OUT/ VREF_OUT VREF_OUT/
CMP1_IN5/
CMP1_IN5/
CMP0_IN5/
CMP0_IN5/
ADC1_SE1
ADC1_SE1
8
8
• 22 TRI0_OUT/ TRI0_OUT/ TRI0_OUT/
OP1_DM2 OP1_DM2 OP1_DM2
• 23 TRI0_DM TRI0_DM TRI0_DM
• 24 TRI0_DP TRI0_DP TRI0_DP
• 25 TRI1_DM TRI1_DM TRI1_DM
• 26 TRI1_DP TRI1_DP TRI1_DP
• 27 TRI1_OUT/ TRI1_OUT TRI1_OUT/
ADC1_SE2
ADC1_SE2
2
2
• 28 DAC0_OUT/ DAC0_OUT DAC0_OUT/
CMP1_IN3/
CMP1_IN3/
ADC0_SE2
ADC0_SE2
3/OP0_DP4/
3/OP0_DP4/
OP1_DP4
OP1_DP4
• 29 DAC1_OUT/ DAC1_OUT DAC1_OUT/
ADC1_SE2
ADC1_SE2
3/OP0_DP5/
3/OP0_DP5/
OP1_DP5
OP1_DP5
• 30 XTAL32 XTAL32 XTAL32
• 31 EXTAL32 EXTAL32 EXTAL32
• 32 VBAT
VBAT
VBAT
• 33 PTA0
JTAG_TCL TSI0_CH1 PTA0
K/
SWD_CLK/
EZP_CLK
UART0_CT FTM0_CH5
S_b
JTAG_TCL EZP_CLK
K/
SWD_CLK
• 34 PTA1
JTAG_TDI/ TSI0_CH2 PTA1
EZP_DI
UART0_RX FTM0_CH6
JTAG_TDI EZP_DI
K51 Sub-Family Data Sheet Data Sheet, Rev. 4, 3/2011.
64
Preliminary
Freescale Semiconductor, Inc.