MSC8252 Datasheet, PDF (61/68 Pages) Freescale Semiconductor, Inc – orderDual-Core Digital Signal Processor

Hardware Design Considerations
Table 45. Connectivity of HSSI Related Pins When Specific Lane Is Not Used (continued)
Signal Name
SR[1–2]_RXDn
SR[1–2]_RXDn
SR[1–2]_TXDn
SR[1–2]_TXDn
SR[1–2]_PLL_AVDD
SR[1–2]_PLL_AGND
SXPVSS
SXCVSS
SXPVDD
SXCVDD
Note: The n indicates the lane number {0,1,2,3} for all unused lanes.
Pin Connection
SXCVSS
SXCVSS
NC
NC
in use
in use
in use
in use
in use
in use
3.5.3 RGMII Ethernet Related Pins
Note: Table 46 and Table 47 assume that the alternate function of the specified pin is not used. If the alternate function is
used, connect the pin as required to support that function.
Table 46. Connectivity of RGMII Related Pins When the RGMII Interface Is Not Used
Signal Name
GE1_RX_CTL
GE2_TX_CTL
Note: Assuming GE1 and GE2 are disabled in the reset configuration word.
Pin Connection
GND
NC
GE_MDC and GE_MDIO pins should be connected as required by the specified protocol. If neither GE1 nor GE2 is used,
Table 47 lists the recommended management pin connections.
Table 47. Connectivity of GE Management Pins When GE1 and GE2 Are Not Used
GE_MDC
GE_MDIO
Signal Name
Pin Connection
NC
NC
3.5.4 TDM Interface Related Pins
Table 48 lists the board connections of the TDM pins when an entire specific TDM is not used. For multiplexing options that
select a subset of a TDM interface, use the connections described in Table 48 for those signals that are not selected. Table 48
assumes that the alternate function of the specified pin is not used. If the alternate function is used, connect that pin as required
to support the selected function.
Table 48. Connectivity of TDM Related Pins When TDM Interface Is Not Used
Signal Name
Pin Connection
TDMnRCLK
TDMnRDAT
TDMnRSYN
GND
GND
GND
MSC8252 Dual-Core Digital Signal Processor Data Sheet, Rev. 3
Freescale Semiconductor
61