MSC8252 Datasheet, PDF (48/68 Pages) Freescale Semiconductor, Inc – orderDual-Core Digital Signal Processor

Electrical Characteristics
Table 35 presents the RGMII AC timing specification for applications required non-delayed clock on board.
Table 35. RGMII at 1 GHz² with No On-Board Delay³ AC Timing Specifications
Parameter/Condition
Symbol
Min
Typ
Max Unit
Data to clock output skew (at transmitter)⁴
Data to clock input skew (at receiver)⁴
t_SKEWT
–2,6
—
–1.0
ns
t_SKEWR
–0.5
—
0.5
ns
Notes: 1. At recommended operating conditions with V_DDIO of 2.5 V ± 5%.
2. RGMII at 100 MHz support is guaranteed by design.
3. GCR4 should be programmed as 0x000CC330.
4. This implies that PC board design requires clocks to be routed with no additional trace delay
Figure 25 shows the RGMII AC timing and multiplexing diagrams.
GTX_CLK
(At Transmitter)
TXD[3:0]
TX_CTL
txd[3:0] txd[7:4]
t_SKEWT
RXD[3:0]
rxd[3:0] rxd[8:5]
RX_CTL
RX_CLK
(At Receiver)
Figure 25. RGMII AC Timing and Multiplexing
t_SKEWR
2.6.6 SPI Timing
Table 36 lists the SPI input and output AC timing specifications.
Table 36. SPI AC Timing Specifications
Parameter
Symbol ¹
Min
SPI outputs valid—Master mode (internal clock) delay
t_NIKHOV
—
SPI outputs hold—Master mode (internal clock) delay
t_NIKHOX
0.5
SPI outputs valid—Slave mode (external clock) delay
t_NEKHOV
—
SPI outputs hold—Slave mode (external clock) delay
t_NEKHOX
2
SPI inputs—Master mode (internal clock) input setup time
t_NIIVKH
12
Max
Unit
Note
6
ns
2
—
ns
2
12
ns
2
—
ns
2
—
ns
—
MSC8252 Dual-Core Digital Signal Processor Data Sheet, Rev. 3
48
Freescale Semiconductor