MSC8252 Datasheet, PDF (24/68 Pages) Freescale Semiconductor, Inc – orderDual-Core Digital Signal Processor

Electrical Characteristics
2.2 Recommended Operating Conditions
Table 3 lists recommended operating conditions. Proper device operation outside of these conditions is not guaranteed.
Table 3. Recommended Operating Conditions
Rating
Symbol
Min
Nominal
Max
Unit
Core supply voltage
M3 memory supply voltage
DDR memory supply voltage
• DDR2 mode
• DDR3 mode
DDR reference voltage
I/O voltage excluding DDR and
RapidIO lines
V_DD
V_DDM3
V_DDDDR
MV_REF
V_DDIO
0.97
0.97
1.7
1.425
0.49 × V_DDDDR
2.375
1.0
1.0
1.8
1.5
0.5 × V_DDDDR
2.5
1.05
V
1.05
V
1.9
V
1.575
V
0.51 × V_DDDDR
V
2.625
V
Rapid I/O pad voltage
Rapid I/O core voltage
Operating temperature range:
• Standard
• Higher
• Extended
Typical power: 1 GHz at 1.0 V¹
V_DDSXP
V_DDSXC
T_J
T_J
T_A
T_J
P
0.97
0.97
0
0
–40
—
—
1.0
1.0
3.54
1.05
V
1.05
V
90
°C
105
°C
—
°C
105
—
W
Notes: 1. The typical power values are derived for a device running under the following conditions.
• Two cores running at 1 GHz, Core voltage at 1V, 75% utilization (50% control/50% DSP).
• A single 64 bit DDR3 running at 800 MHz, 50% utilization (50% reads/50% writes).
• M3 Memory 50% utilized, PCI Express controller disabled, TDM enabled 20% loading, Serial RapidIO controller
disabled, 1 RGMII at 1 Gbps 50% loading.
• A junction temperature of 60°C.
2.3 Thermal Characteristics
Table 4 describes thermal characteristics of the MSC8252 for the FC-PBGA packages.
Table 4. Thermal Characteristics for the MSC8252
Characteristic
Symbol
FC-PBGA
29 × 29 mm²
Unit
Natural
200 ft/min
Convection
(1 m/s) airflow
Junction-to-ambient^{1, 2}
Junction-to-ambient, four-layer board^{1, 2}
Junction-to-board (bottom)³
Junction-to-case⁴
R_θJA
18
R_θJA
13
R_θJB
5
R_θJC
0.6
12
°C/W
9
°C/W
°C/W
°C/W
Notes: 1. Junction temperature is a function of die size, on-chip power dissipation, package thermal resistance, mounting site (board)
temperature, ambient temperature, air flow, power dissipation of other components on the board, and board thermal
resistance.
2. Junction-to-ambient thermal resistance determined per JEDEC JESD51-3 and JESDC51-6. Thermal test board meets JEDEC
specification for the specified package.
3. Junction-to-board thermal resistance determined per JEDEC JESD 51-8. Thermal test board meets JEDEC specification for
the specified package.
4. Junction-to-case at the top of the package determined using MIL- STD-883 Method 1012.1. The cold plate temperature is used
for the case temperature. Reported value includes the thermal resistance of the interface layer
MSC8252 Dual-Core Digital Signal Processor Data Sheet, Rev. 3
24
Freescale Semiconductor