MSC8252 Datasheet, PDF (30/68 Pages) Freescale Semiconductor, Inc – orderDual-Core Digital Signal Processor

Electrical Characteristics
2.5.2.3 SerDes Transmitter and Receiver Reference Circuits
Figure 6 shows the reference circuits for SerDes data lane transmitter and receiver.
50 Ω ^{SR[1–2]_TXm}
Transmitter
50 Ω
SR[1–2]_TXm
SR[1–2]_RXm
50 Ω
Receiver
SR[1–2]_RXm 50 Ω
Note: The [1–2] indicates the specific SerDes Interface (1 or 2) and the m indicates the
specific channel within that interface (0,1,2,3). Actual signals are assigned by the
HRCW assignments at reset (see Chapter 5, Reset in the reference manual for details)
Figure 6. SerDes Transmitter and Receiver Reference Circuits
2.5.3 DC-Level Requirements for SerDes Interfaces
The following subsections define the DC-level requirements for the SerDes reference clocks, the PCI Express data lines, the
Serial RapidIO data lines, and the SGMII data lines.
2.5.3.1 DC-Level Requirements for SerDes Reference Clocks
The DC-level requirement for the SerDes reference clock inputs is different depending on the signaling mode used to connect
the clock driver chip and SerDes reference clock inputs, as described below:
• Differential Mode
— The input amplitude of the differential clock must be between 400 mV and 1600 mV differential peak-peak (or
between 200 mV and 800 mV differential peak). In other words, each signal wire of the differential pair must have
a single-ended swing of less than 800 mV and greater than 200 mV. This requirement is the same for both external
DC-coupled or AC-coupled connection.
— For an external DC-coupled connection, the maximum average current requirements sets the requirement for
average voltage (common mode voltage) as between 100 mV and 400 mV. Figure 7 shows the SerDes reference
clock input requirement for DC-coupled connection scheme.
200 mV < Input Amplitude or Differential Peak < 800 mV
SR[1–2]_REF_CLK
Vmax < 800 mV
100 mV < Vcm < 400 mV
SR[1–2]_REF_CLK
Vmin > 0 V
Figure 7. Differential Reference Clock Input DC Requirements (External DC-Coupled)
MSC8252 Dual-Core Digital Signal Processor Data Sheet, Rev. 3
30
Freescale Semiconductor