MC68HC908AB32 Datasheet, PDF (60/392 Pages) Motorola, Inc – HCMOS Microcontroller Unit

FLASH Memory
page. Hence the minimum erase page size is 128 bytes. Program and
erase operations are facilitated through control bits in the FLASH Control
Register (FLCR). Details for these operations appear later in this
section. The address ranges for the user memory and vectors are:
• $8000–$FDFF; user memory.
• $FF7E; FLASH block protect register.
• $FE08; FLASH control register.
• $FFDC–$FFFF; these locations are reserved for user-defined
interrupt and reset vectors.
Programming tools are available from Freescale. Contact your local
Freescale representative for more information.
NOTE: A security feature prevents viewing of the FLASH contents.¹
4.4 FLASH Control Register
The FLASH control register (FLCR) controls FLASH program and erase
operations.
Address: $FE08
Bit 7
6
5
4
3
2
1
Bit 0
Read: 0
0
0
0
HVEN MASS ERASE PGM
Write:
Reset: 0
0
0
0
0
0
0
0
Figure 4-1. FLASH Control Register (FLCR)
HVEN — High-Voltage Enable Bit
This read/write bit enables the charge pump to drive high voltages for
program and erase operations in the array. HVEN can only be set if
either PGM = 1 or ERASE = 1 and the proper sequence for program
or erase is followed.
1 = High voltage enabled to array and charge pump on
0 = High voltage disabled to array and charge pump off
1. No security feature is absolutely secure. However, Freescale’s strategy is to make reading or
copying the FLASH difficult for unauthorized users.
Technical Data
60
FLASH Memory
MC68HC908AB32 — Rev. 1.1
Freescale Semiconductor