MC68HC908AB32 Datasheet, PDF (228/392 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Programmable Interrupt Timer (PIT)
Address: $004D
Bit 7
6
5
4
3
2
1
Bit 0
Read: Bit 7
6
5
4
3
2
1
Bit 0
Write:
Reset: 0
0
0
0
0
0
0
0
= Unimplemented
Figure 13-5. PIT Counter Register Low (PCNTL)
13.7.3 PIT Counter Modulo Registers
The read/write PIT modulo registers contain the modulo value for the PIT
counter. When the PIT counter reaches the modulo value, the overflow
flag (POF) becomes set, and the PIT counter resumes counting from
$0000 at the next clock. Writing to the high byte (PMODH) inhibits the
POF bit and overflow interrupts until the low byte (PMODL) is written.
Reset sets the PIT counter modulo registers.
Address: $004E
Bit 7
6
5
4
3
2
Read:
Bit 15
14
13
12
11
10
Write:
1
Bit 0
9
Bit 8
Reset: 1
1
1
1
1
1
1
1
Figure 13-6. PIT Counter Modulo Register High (PMODH)
Address: $004F
Bit 7
6
5
4
3
2
1
Bit 0
Read:
Bit 7
6
5
4
3
2
1
Bit 0
Write:
Reset: 1
1
1
1
1
1
1
1
Figure 13-7. PIT Counter Modulo Register Low (PMODL)
NOTE: Reset the PIT counter before writing to the PIT counter modulo registers.
Technical Data
228
Programmable Interrupt Timer (PIT)
MC68HC908AB32 — Rev. 1.1
Freescale Semiconductor