MC68HC908AB32 Datasheet, PDF (378/392 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Electrical Specifications
23.8 5.0-V Control Timing
Characteristic⁽¹⁾
Symbol
Min
Max Unit
Frequency of operation
Crystal option⁽²⁾
External clock option⁽³⁾
f_osc
1
8.4 MHz
dc⁽⁴⁾
33.6 MHz
Internal operating frequency
RESET input pulse width low⁽⁶⁾
IRQ interrupt pulse width low⁽⁷⁾
(Edge-triggered)
f_BUS
t_IRL
t_ILIH
Note⁽⁵⁾
1.5
1.5
8.4 MHz
—
t_cyc
—
t_cyc
IRQ interrupt pulse period
t_ILIL
Note⁽⁸⁾
—
t_cyc
16-bit timer
Input capture pulse width
Input capture period
t_TH,t_TL
t_TLTL
2
Note⁽⁹⁾
—
t_cyc
—
t_cyc
Notes:
1. V_DD = 5.0 Vdc ± 10%, V_SS = 0 Vdc, T_A = T_L to T_H, unless otherwise noted
2. See 23.12 Clock Generation Module Characteristics for more information.
3. No more than 10% duty cycle deviation from 50%
4. Some modules may require a minimum frequency greater than dc for proper operation.
See appropriate table for this information.
5. Some modules may require a minimum frequency greater than dc for proper operation.
See appropriate table for this information.
6. Minimum pulse width reset is guaranteed to be recognized. It is possible for a smaller pulse
width to cause a reset.
7. Minimum pulse width is for guaranteed interrupt. It is possible for a smaller pulse width to
be recognized.
8. Minimum pulse width is for guaranteed interrupt. It is possible for a smaller pulse width to
be recognized. The minimum period, t_ILIL or t_TLTL, should not be less than the number of
cycles it takes to execute the interrupt service routine plus TBD t_cyc.
9. The minimum period, t_ILIL or t_TLTL, should not be less than the number of cycles it takes to
execute the interrupt service routine plus TBD t_cyc.
23.9 Timer Interface Module Characteristics
Characteristic
Input capture pulse width
Input clock pulse width
Symbol
t_TIH, t_TIL
t_TCH, t_TCL
Min
125
(1/f_BUS) + 5
Max
—
—
Unit
ns
ns
Technical Data
378
Electrical Specifications
MC68HC908AB32 — Rev. 1.1
Freescale Semiconductor