MC68HC908AB32 Datasheet, PDF (139/392 Pages) Motorola, Inc – HCMOS Microcontroller Unit

Clock Generator Module (CGM)
5. Calculate and verify the adequacy of the VCO and bus
frequencies f_VCLK and f_BUS.
f_VCLK = N × f_RCLK
f_BUS = (f_VCLK) ⁄ 4
6. Select a VCO linear range multiplier, L.
L
=
ro
u
n
d


f-f-_{V-N--C-O---L-M-K-}
where f_NOM = 4.9152MHz
7. Calculate and verify the adequacy of the VCO programmed
center-of-range frequency f_VRS.
f_VRS = (L)f_NOM
NOTE:
8. Verify the choice of N and L by comparing f_VCLK to f_VRS and
f_VCLKDES. For proper operation, f_VCLK must be within the
application’s tolerance of f_VCLKDES, and f_VRS must be as close as
possible to f_VCLK.
Exceeding the recommended maximum bus frequency or VCO
frequency can cause the MCU to “crash”.
9. Program the PLL registers accordingly:
a. In the upper 4 bits of the PLL programming register (PPG),
program the binary equivalent of N.
b. In the lower 4 bits of the PLL programming register (PPG),
program the binary equivalent of L.
9.4.2.5 Special Programming Exceptions
The programming method described in 9.4.2.4 Programming the PLL
does not account for two possible exceptions — a value of zero for N or
L is meaningless when used in the equations given. To account for these
exceptions:
MC68HC908AB32 — Rev. 1.1
Freescale Semiconductor
Clock Generator Module (CGM)
Technical Data
139