K60P104M100SF2 Datasheet, PDF (54/67 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Data Sheet

Peripheral operating requirements and behaviors
Table 39. Slave Mode DSPI Timing (Low-speed Mode) (continued)
Num
Description
Min.
Max.
Unit
DS10
DSPI_SCK input high/low time
(t_SCK/2) - 4
(t_SCK/2) + 4
ns
DS11
DSPI_SCK to DSPI_SOUT valid
—
20
ns
DS12
DSPI_SCK to DSPI_SOUT invalid
0
—
ns
DS13
DSPI_SIN to DSPI_SCK input setup
5
—
ns
DS14
DSPI_SCK to DSIP_SIN input hold
15
—
ns
DS15
DSPI_SS active to DSPI_SOUT driven
—
15
ns
DS16
DSPI_SS inactive to DSPI_SOUT not driven
—
15
ns
y _{DSPI_SS}
ar ^DSPI_SCK
(CPOL=0)
in ^DSPI_SOUT
DSPI_SIN
DS10
DS15
DS13
First data
DS14
First data
DS12
Data
Data
DS9
DS11
Last data
DS16
Last data
lim ^{Figure 21. DSPI Classic SPI Timing — Slave Mode}
e _{6.8.6 DSPI Switching Specifications (High-speed mode)}
r _{The DMA Serial Peripheral Interface (DSPI) provides a synchronous serial bus with}
master and slave operations. Many of the transfer attributes are programmable. The tables
P _{below provide DSPI timing characteristics for classic SPI timing modes. Refer to the}
DSPI chapter of the Reference Manual for information on the modified transfer formats
used for communicating with slower peripheral devices.
Table 40. Master Mode DSPI Timing (High-speed mode)
Num
DS1
DS2
DS3
Operating voltage
Description
Frequency of operation
DSPI_SCK output cycle time
DSPI_SCK output high/low time
DSPI_PCSn to DSPI_SCK output valid
Min.
2.7
—
2 x t_BCLK
(t_SCK/2) − 2
(t_SCK/2) − 2
Max.
3.6
25
—
(t_SCK/2) + 2
—
Unit
V
MHz
ns
ns
ns
Table continues on the next page...
K60 Sub-Family Data Sheet Data Sheet, Rev. 1, 11/2010.
54
Preliminary
Freescale Semiconductor, Inc.