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K60P104M100SF2 Datasheet, PDF (38/67 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Data Sheet | |||
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Peripheral operating requirements and behaviors
Table 23. 16-bit ADC operating conditions (continued)
Symbol Description
RAS Analog source
resistance
Conditions
16 bit modes
⢠fADCK > 8MHz
⢠fADCK = 4â8MHz
⢠fADCK < 4MHz
Min.
â
â
â
Typ.1
â
â
â
Max.
0.5
1
2
Unit
kΩ
kΩ
kΩ
Notes
External to MCU
Assumes
ADLSMP=0
fADCK
ADC conversion
clock frequency
13/12 bit modes
⢠fADCK > 16MHz
â
⢠fADCK > 8MHz
â
⢠fADCK = 4â8MHz
â
⢠fADCK < 4MHz
â
11/10 bit modes
⢠fADCK > 8MHz
â
⢠fADCK = 4â8MHz
â
⢠fADCK < 4MHz
â
â
0.5
kΩ
â
1
kΩ
â
2
kΩ
y â
5
kΩ
r â
2
kΩ
a â
5
kΩ
inâ
10
kΩ
9/8 bit modes
⢠fADCK > 8MHz
â
â
⢠fADCK < 8MHz
â
â
lim ADLPC=0, ADHSC=1
⢠16 bit modes
1.0
â
⢠â¤13 bit modes
1.0
â
ADLPC=0, ADHSC=0
e ⢠16 bit modes
1.0
â
r⢠â¤13 bit modes
1.0
â
PADLPC=1, ADHSC=1
5
10
TBD
TBD
8.0
12.0
kΩ
kΩ
MHz
MHz
MHz
MHz
⢠16 bit modes
1.0
â
5.0
MHz
⢠â¤13 bit modes
1.0
â
8.0
MHz
ADLPC=1, ADHSC=0
⢠16 bit modes
1.0
â
2.5
MHz
⢠â¤13 bit modes
1.0
â
5.0
MHz
1. Typical values assume VDDA = 3.0 V, Temp = 25°C, fADCK = 1.0 MHz unless otherwise stated. Typical values are for
reference only and are not tested in production.
2. DC potential difference.
K60 Sub-Family Data Sheet Data Sheet, Rev. 1, 11/2010.
38
Preliminary
Freescale Semiconductor, Inc.
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