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K60P104M100SF2 Datasheet, PDF (47/67 Pages) Freescale Semiconductor, Inc – K60 Sub-Family Data Sheet | |||
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Peripheral operating requirements and behaviors
Table 29. 12-bit DAC operating behaviors (continued)
Symbol
SR
Description
Slew rate -80hâ F7Fhâ 80h
⢠High power (SPHP)
⢠Low power (SPLP)
Min.
1.2
0.05
Typ.
1.7
0.12
Max.
â
â
Unit
V/μs
Notes
CT
Channel to channel cross talk
â
â
-80
dB
BW 3dB bandwidth
kHz
⢠High power (SPHP)
550
⢠Low power (SPLP)
40
1. Settling within ±1 LSB
2. The INL is measured for 0+100mV to VDACRâ100 mV
3. The DNL is measured for 0+100 mV to VDACRâ100 mV
4. The DNL is measured for 0+100mV to VDACRâ100 mV with VDDA > 2.4V
5. Calculated by a best fit curve from VSS+100 mV to VREFâ100 mV
â
â
iânaâ ry
Prelim
Figure 14. Typical INL error vs. digital code
K60 Sub-Family Data Sheet Data Sheet, Rev. 1, 11/2010.
Freescale Semiconductor, Inc.
Preliminary
47
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