DSP56853 Datasheet, PDF (538/662 Pages) Freescale Semiconductor, Inc – Digitial Signal Controller

Application:
ITCN
Date:
Programmer:
Sheet 16 of 24
Interrupt Priority Register 8 (IPR8) continued
Bits
3-2
1-0
Name
SCI1_TIDL IPL
SCI1_TIDL IPL
Description
SCI1 Receiver Idle Interrupt Level
This bit field is used to set the interrupt priority levels for this peripheral IRQ. These IRQs are limited
to priorities 0-2 and are disabled by default.
00 IRQ disabled by default
01 IRQ is priority level 0
10 IRQ is priority level 1
11 IRQ is priority level 2
SCI1 Transmitter Idle Interrupt Priority Level
This bit field is used to set the interrupt priority levels for this peripheral IRQ.These IRQs are limited
to priorities 0-2 and are disabled by default.
00 IRQ disabled by default
01 IRQ is priority level 0
10 IRQ is priority level 1
11 IRQ is priority level 2
Bits 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
Interrupt Priority
Read 0
Register 8 (IPR8)
$1FFF20 + $8
Write
0
0
0
0
0 _{SCI1_RCV SCI1_RERR SCI1_RIDL SCI1_TIDL SCI1_XMIT}
IPL
IPL
IPL
IPL
IPL
Reset 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
C
B-36
denotes Reserved Bits
5685X Digital Signal Controller User Manual, Rev. 4
Freescale Semiconductor