DSP56853 Datasheet, PDF (210/662 Pages) Freescale Semiconductor, Inc – Digitial Signal Controller

Register Descriptions (ITCN_BASE = $1FFF20)
8.7.17 Interrupt Vector Map
Table 8-3 provides the list of interrupt vectors on the 56853 through 858 devices. As noted in the
table, the total vector table size is 128 vectors or 256 words of memory. This table also provides
the allowable priority range or fixed priority for each IRQ.
Table 8-3. Interrupt Vector Table Contents
Peripheral
Vector
Number
Priority
Level
Vector
Base
Address +
Interrupt Function
Core
Core
Core
Core
Core
Core
Core
Core
Core
Core
Core
Core
Core
Core
Core
Core
Core
Core
Core
Core
PLL
—
0
3
1
3
2
3
3
3
4
3
5
3
6
1-3
7
1-3
8
1-3
9
1-3
10
1-3
11
1-3
12
0-3
13
0-3
14
2
15
1
16
0
17
0-2
18
0-2
19
0-2
20
0-2
21
0-2
P:$00
P:$02
P:$04
P:$06
P:$08
P:$0A
P:$0C
P:$0E
P:$10
P:$12
P:$14
P:$16
P:$18
P:$1A
P:$1C
P:$1E
P:$20
P:$22
P:$24
P:$26
P:$28
P:$2A
Reserved
Reserved
Illegal Instruction
SW Interrupt 3
HW Stack Overflow
Misaligned Long Word Access
EOnCE Step Counter
EOnCE Breakpoint Unit 0
Reserved
EOnCE Trace Buffer
EOnCE Transmit Register Empty
EOnCE Receive Register Full
Reserved
Reserved
SW Interrupt 2
SW Interrupt 1
SW Interrupt 0
IRQA
IRQB
Reserved
PLL Loss Of Lock
Reserved
DMA
22
0-2
P:$2C DMA_DONE 0
DMA
23
0-2
P:$2E DMA_DONE 1
DMA
24
0-2
P:$30 DMA_DONE 2
DMA
25
0-2
P:$32 DMA_DONE 3
DMA
26
0-2
P:$34 DMA_DONE 4
DMA
27
0-2
P:$36 DMA_DONE 5
ESSI 0
28
0-2
P:$38 ESSI 0 Receive Data with Exception Status
ESSI 0
29
0-2
P:$3A ESSI 0 Receive Data
ESSI 0
30
0-2
P:$3C ESSI 0 Receive Last Slot
ESSI 0
31
0-2
P:$3E ESSI 0 Transmit Data with Exception Status
Chip
Exceptions
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
8-32
5685X Digital Signal Controller User Manual, Rev. 4
Freescale Semiconductor