DSP56853 Datasheet, PDF (195/662 Pages) Freescale Semiconductor, Inc – Digitial Signal Controller

Register Descriptions (ITCN_BASE = $1FFF20)
• 00 = IRQ disabled (default)
• 01 = IRQ is priority level 0
• 10 = IRQ is priority level 1
• 11 = IRQ is priority level 2
8.7.6.2 Host I/F Receive Data Interrupt Priority Level
(HOST_RCV IPL)—Bits 13–12
This bit field is used to set the interrupt priority levels for certain peripheral IRQs. These IRQs
are limited to priorities zero through two and are disabled by default.
• 00 = IRQ disabled (default)
• 01 = IRQ is priority level 0
• 10 = IRQ is priority level 1
• 11 = IRQ is priority level 2
8.7.6.3 SCI 0 Receiver Full Interrupt Priority Level
(SCI0_RCV IPL)—Bits 11–10
This bit field is used to set the interrupt priority levels for certain peripheral IRQs. These IRQs
are limited to priorities zero through two and are disabled by default.
• 00 = IRQ disabled (default)
• 01 = IRQ is priority level 0
• 10 = IRQ is priority level 1
• 11 = IRQ is priority level 2
8.7.6.4 SCI0 Receiver Error Interrupt Priority Level
(SCI0_RERR IPL)—Bits 9–8
This bit field is used to set the interrupt priority levels for certain peripheral IRQs. These IRQs
are limited to priorities zero through two and are disabled by default.
• 00 = IRQ disabled (default)
• 01 = IRQ is priority level 0
• 10 = IRQ is priority level 1
• 11 = IRQ is priority level 2
Freescale Semiconductor
Overview, Rev. 4
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